diff options
Diffstat (limited to 'www-client/firefox/files/firefox-riscv64-support.patch')
| -rw-r--r-- | www-client/firefox/files/firefox-riscv64-support.patch | 3283 |
1 files changed, 0 insertions, 3283 deletions
diff --git a/www-client/firefox/files/firefox-riscv64-support.patch b/www-client/firefox/files/firefox-riscv64-support.patch deleted file mode 100644 index 7e9abfc..0000000 --- a/www-client/firefox/files/firefox-riscv64-support.patch +++ /dev/null @@ -1,3283 +0,0 @@ -patch generated directly from https://github.com/makotokato/gecko-dev by - - git diff master..riscv64 -- . :^third_party - -:^third_party is a git feature to exclude third_party/ from diff - -diff --git a/.cargo/config.in b/.cargo/config.in -index 20b8c3fad8..34c5f9a1f4 100644 ---- a/.cargo/config.in -+++ b/.cargo/config.in -@@ -22,11 +22,6 @@ git = "https://github.com/mozilla/mp4parse-rust" - replace-with = "vendored-sources" - rev = "3bfc47d9a571d0842676043ba60716318e946c06" - --[source."https://github.com/mozilla/midir.git"] --git = "https://github.com/mozilla/midir.git" --replace-with = "vendored-sources" --rev = "4c11f0ffb5d6a10de4aff40a7b81218b33b94e6f" -- - [source."https://github.com/mozilla/cubeb-pulse-rs"] - git = "https://github.com/mozilla/cubeb-pulse-rs" - replace-with = "vendored-sources" -@@ -37,6 +32,11 @@ git = "https://github.com/mozilla/cubeb-coreaudio-rs" - replace-with = "vendored-sources" - rev = "44eca95823bb57e964cf7b6d9791ed2ccb4b2108" - -+[source."https://github.com/mozilla/authenticator-rs"] -+git = "https://github.com/mozilla/authenticator-rs" -+replace-with = "vendored-sources" -+rev = "b85bccf0527e42c877573029e8d35ff13ef06f9d" -+ - [source."https://github.com/mozilla/audioipc"] - git = "https://github.com/mozilla/audioipc" - replace-with = "vendored-sources" -diff --git a/Cargo.lock b/Cargo.lock -index 85a143565c..b4924869cb 100644 ---- a/Cargo.lock -+++ b/Cargo.lock -@@ -30,14 +30,14 @@ dependencies = [ - - [[package]] - name = "alsa" --version = "0.4.3" -+version = "0.6.0" - source = "registry+https://github.com/rust-lang/crates.io-index" --checksum = "eb213f6b3e4b1480a60931ca2035794aa67b73103d254715b1db7b70dcb3c934" -+checksum = "5915f52fe2cf65e83924d037b6c5290b7cee097c6b5c8700746e6168a343fd6b" - dependencies = [ - "alsa-sys", - "bitflags", - "libc", -- "nix", -+ "nix 0.23.1", - ] - - [[package]] -@@ -359,9 +359,8 @@ dependencies = [ - - [[package]] - name = "authenticator" --version = "0.3.1" --source = "registry+https://github.com/rust-lang/crates.io-index" --checksum = "08cee7a0952628fde958e149507c2bb321ab4fccfafd225da0b20adc956ef88a" -+version = "0.3.2" -+source = "git+https://github.com/mozilla/authenticator-rs?rev=b85bccf0527e42c877573029e8d35ff13ef06f9d#b85bccf0527e42c877573029e8d35ff13ef06f9d" - dependencies = [ - "bitflags", - "core-foundation", -@@ -369,7 +368,7 @@ dependencies = [ - "libc", - "libudev", - "log", -- "rand 0.7.999", -+ "rand 0.8.5", - "runloop", - "winapi", - ] -@@ -2204,6 +2203,7 @@ dependencies = [ - "log", - "mapped_hyph", - "mdns_service", -+ "midir", - "midir_impl", - "mio 0.8.0", - "moz_asserts", -@@ -3274,8 +3274,9 @@ dependencies = [ - - [[package]] - name = "midir" --version = "0.7.0" --source = "git+https://github.com/mozilla/midir.git?rev=4c11f0ffb5d6a10de4aff40a7b81218b33b94e6f#4c11f0ffb5d6a10de4aff40a7b81218b33b94e6f" -+version = "0.8.0" -+source = "registry+https://github.com/rust-lang/crates.io-index" -+checksum = "2c1c68e2b589cce71b14a10d7d1599a845673f9decde80fa9e8500fdccd50dca" - dependencies = [ - "alsa", - "bitflags", -@@ -3283,10 +3284,9 @@ dependencies = [ - "js-sys", - "libc", - "memalloc", -- "nix", - "wasm-bindgen", - "web-sys", -- "winapi", -+ "windows", - ] - - [[package]] -@@ -3325,7 +3325,7 @@ dependencies = [ - "libc", - "memmap2 0.2.999", - "memoffset 0.5.6", -- "nix", -+ "nix 0.15.0", - "tempfile", - "thiserror", - ] -@@ -3735,6 +3735,19 @@ dependencies = [ - "void", - ] - -+[[package]] -+name = "nix" -+version = "0.23.1" -+source = "registry+https://github.com/rust-lang/crates.io-index" -+checksum = "9f866317acbd3a240710c63f065ffb1e4fd466259045ccb504130b7f668f35c6" -+dependencies = [ -+ "bitflags", -+ "cc", -+ "cfg-if 1.0.0", -+ "libc", -+ "memoffset 0.6.5", -+] -+ - [[package]] - name = "nom" - version = "5.999.999" -@@ -6218,6 +6231,49 @@ version = "0.4.0" - source = "registry+https://github.com/rust-lang/crates.io-index" - checksum = "712e227841d057c1ee1cd2fb22fa7e5a5461ae8e48fa2ca79ec42cfc1931183f" - -+[[package]] -+name = "windows" -+version = "0.32.0" -+source = "registry+https://github.com/rust-lang/crates.io-index" -+checksum = "fbedf6db9096bc2364adce0ae0aa636dcd89f3c3f2cd67947062aaf0ca2a10ec" -+dependencies = [ -+ "windows_aarch64_msvc", -+ "windows_i686_gnu", -+ "windows_i686_msvc", -+ "windows_x86_64_gnu", -+ "windows_x86_64_msvc", -+] -+ -+[[package]] -+name = "windows_aarch64_msvc" -+version = "0.32.0" -+source = "registry+https://github.com/rust-lang/crates.io-index" -+checksum = "d8e92753b1c443191654ec532f14c199742964a061be25d77d7a96f09db20bf5" -+ -+[[package]] -+name = "windows_i686_gnu" -+version = "0.32.0" -+source = "registry+https://github.com/rust-lang/crates.io-index" -+checksum = "6a711c68811799e017b6038e0922cb27a5e2f43a2ddb609fe0b6f3eeda9de615" -+ -+[[package]] -+name = "windows_i686_msvc" -+version = "0.32.0" -+source = "registry+https://github.com/rust-lang/crates.io-index" -+checksum = "146c11bb1a02615db74680b32a68e2d61f553cc24c4eb5b4ca10311740e44172" -+ -+[[package]] -+name = "windows_x86_64_gnu" -+version = "0.32.0" -+source = "registry+https://github.com/rust-lang/crates.io-index" -+checksum = "c912b12f7454c6620635bbff3450962753834be2a594819bd5e945af18ec64bc" -+ -+[[package]] -+name = "windows_x86_64_msvc" -+version = "0.32.0" -+source = "registry+https://github.com/rust-lang/crates.io-index" -+checksum = "504a2476202769977a040c6364301a3f65d0cc9e3fb08600b2bda150a0488316" -+ - [[package]] - name = "wineventlog" - version = "0.1.0" -diff --git a/Cargo.toml b/Cargo.toml -index 2b499a0841..dcf1e401d7 100644 ---- a/Cargo.toml -+++ b/Cargo.toml -@@ -153,7 +153,6 @@ coremidi = { git = "https://github.com/chris-zen/coremidi.git", rev="fc68464b544 - fog = { path = "toolkit/components/glean/api" } - libudev-sys = { path = "dom/webauthn/libudev-sys" } - packed_simd = { package = "packed_simd_2", git = "https://github.com/hsivonen/packed_simd", rev="c149d0a519bf878567c7630096737669ec2ff15f" } --midir = { git = "https://github.com/mozilla/midir.git", rev = "4c11f0ffb5d6a10de4aff40a7b81218b33b94e6f" } - minidump_writer_linux = { git = "https://github.com/rust-minidump/minidump-writer.git", rev = "75ada456c92a429704691a85e1cb42fef8cafc0d" } - - # application-services overrides to make updating them all simpler. -diff --git a/README.riscv64.md b/README.riscv64.md -new file mode 100644 -index 0000000000..705099a3db ---- /dev/null -+++ b/README.riscv64.md -@@ -0,0 +1,69 @@ -+## Cross building -+I recommend you should use docker environment -+ -+#### Dockerfile -+```dockerfile -+FROM ubuntu:21.04 -+MAINTAINER Makoto Kato <m_kato@ga2.so-net.ne.jp> -+ -+ADD sources.list /etc/apt/ -+ENV DEBIAN_FRONTEND=noninteractive -+RUN dpkg --add-architecture riscv64 && \ -+ apt-get update && \ -+ apt-get install -y clang g++ mercurial g++-riscv64-linux-gnu curl gyp ninja-build make python-is-python3 libssl-dev zlib1g-dev nodejs build-essential libpython3-dev m4 unzip zip uuid git python3-pip && \ -+ apt-get install -y zlib1g-dev:riscv64 libssl-dev:riscv64 libffi-dev:riscv64 libasound2-dev:riscv64 libcurl4-openssl-dev:riscv64 libdbus-1-dev:riscv64 libdbus-glib-1-dev:riscv64 libdrm-dev:riscv64 libgtk-3-dev:riscv64 libpulse-dev:riscv64 libx11-xcb-dev:riscv64 libxt-dev:riscv64 xvfb:riscv64 libstdc++-10-dev:riscv64 && \ -+ apt-get clean -+WORKDIR /root -+ENV PATH="/root/.cargo/bin:${PATH}" -+RUN curl https://sh.rustup.rs -s -o install.sh && sh install.sh -y && rm install.sh && rustup target add riscv64gc-unknown-linux-gnu -+RUN cargo install cbindgen -+``` -+ -+#### sources.list -+``` -+deb [arch=amd64] http://archive.ubuntu.com/ubuntu/ hirsute main restricted -+deb [arch=amd64] http://archive.ubuntu.com/ubuntu/ hirsute-updates main restricted -+deb [arch=amd64] http://archive.ubuntu.com/ubuntu/ hirsute universe -+deb [arch=amd64] http://archive.ubuntu.com/ubuntu/ hirsute-updates universe -+deb [arch=amd64] http://archive.ubuntu.com/ubuntu/ hirsute multiverse -+deb [arch=amd64] http://archive.ubuntu.com/ubuntu/ hirsute-updates multiverse -+deb [arch=amd64] http://archive.ubuntu.com/ubuntu/ hirsute-backports main restricted universe multiverse -+deb [arch=amd64] http://security.ubuntu.com/ubuntu/ hirsute-security main restricted -+deb [arch=amd64] http://security.ubuntu.com/ubuntu/ hirsute-security universe -+deb [arch=amd64] http://security.ubuntu.com/ubuntu/ hirsute-security multiverse -+ -+deb [arch=riscv64] http://ports.ubuntu.com/ubuntu-ports hirsute main restricted -+deb [arch=riscv64] http://ports.ubuntu.com/ubuntu-ports hirsute-updates main restricted -+deb [arch=riscv64] http://ports.ubuntu.com/ubuntu-ports hirsute universe -+deb [arch=riscv64] http://ports.ubuntu.com/ubuntu-ports hirsute-updates universe -+deb [arch=riscv64] http://ports.ubuntu.com/ubuntu-ports hirsute multiverse -+deb [arch=riscv64] http://ports.ubuntu.com/ubuntu-ports hirsute-updates multiverse -+deb [arch=riscv64] http://ports.ubuntu.com/ubuntu-ports hirsute-backports main restricted universe multiverse -+deb [arch=riscv64] http://ports.ubuntu.com/ubuntu-ports hirsute-security main restricted -+deb [arch=riscv64] http://ports.ubuntu.com/ubuntu-ports hirsute-security universe -+deb [arch=riscv64] http://ports.ubuntu.com/ubuntu-ports hirsute-security multiverse -+``` -+ -+## mozconfig -+``` -+mk_add_options MOZ_OBJDIR=@TOPSRCDIR@/objdir -+mk_add_options AUTOCLOBBER=1 -+ -+ac_add_options --disable-debug -+ac_add_options --enable-optimize -+ -+ac_add_options --target=riscv64 -+export CC=riscv64-linux-gnu-gcc -+export CXX=riscv64-linux-gnu-g++ -+export HOST_CC=gcc -+export HOST_CXX=g++ -+ac_add_options --disable-bootstrap -+ac_add_options --without-wasm-sandboxed-libraries -+ac_add_options --enable-webrtc -+ac_add_options --disable-crashreporter -+ac_add_options --disable-jit -+``` -+ -+## How to build -+1. `./mach build` -+2. `./mach package` -diff --git a/dom/bindings/moz.build b/dom/bindings/moz.build -index cf3a8d5017..5e1388cfe5 100644 ---- a/dom/bindings/moz.build -+++ b/dom/bindings/moz.build -@@ -96,12 +96,16 @@ LOCAL_INCLUDES += [ - "/layout/xul/tree", - "/media/webrtc/", - "/netwerk/base/", -- "/third_party/libwebrtc", -- "/third_party/libwebrtc/third_party/abseil-cpp", - ] - - LOCAL_INCLUDES += ["/third_party/msgpack/include"] - -+if CONFIG["MOZ_WEBRTC"]: -+ LOCAL_INCLUDES += [ -+ "/third_party/libwebrtc", -+ "/third_party/libwebrtc/third_party/abseil-cpp", -+ ] -+ - DEFINES["GOOGLE_PROTOBUF_NO_RTTI"] = True - DEFINES["GOOGLE_PROTOBUF_NO_STATIC_INITIALIZER"] = True - -diff --git a/dom/media/gtest/moz.build b/dom/media/gtest/moz.build -index 05803392cb..d689c7bd77 100644 ---- a/dom/media/gtest/moz.build -+++ b/dom/media/gtest/moz.build -@@ -13,10 +13,14 @@ LOCAL_INCLUDES += [ - "/dom/media/systemservices", - "/dom/media/webrtc", - "/dom/media/webrtc/common", -- "/third_party/libwebrtc", -- "/third_party/libwebrtc/third_party/abseil-cpp", - ] - -+if CONFIG["MOZ_WEBRTC"]: -+ LOCAL_INCLUDES += [ -+ "/third_party/libwebrtc", -+ "/third_party/libwebrtc/third_party/abseil-cpp", -+ ] -+ - UNIFIED_SOURCES += [ - "MockCubeb.cpp", - "MockMediaResource.cpp", -diff --git a/dom/midi/midir_impl/Cargo.toml b/dom/midi/midir_impl/Cargo.toml -index 7628fb4a68..a918ff2227 100644 ---- a/dom/midi/midir_impl/Cargo.toml -+++ b/dom/midi/midir_impl/Cargo.toml -@@ -7,7 +7,7 @@ edition = "2018" - # See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html - - [dependencies] --midir = "0.7.0" -+midir = "0.8.0" - nsstring = { path = "../../../xpcom/rust/nsstring/" } - uuid = { version = "0.8", features = ["v4"] } - thin-vec = { version = "0.2.1", features = ["gecko-ffi"] } -diff --git a/ipc/glue/moz.build b/ipc/glue/moz.build -index c4b7c1d69e..775f553d05 100644 ---- a/ipc/glue/moz.build -+++ b/ipc/glue/moz.build -@@ -220,6 +220,12 @@ LOCAL_INCLUDES += [ - "/xpcom/build", - ] - -+if CONFIG["MOZ_WEBRTC"]: -+ LOCAL_INCLUDES += [ -+ "/third_party/libwebrtc", -+ "/third_party/libwebrtc/third_party/abseil-cpp", -+ ] -+ - PREPROCESSED_IPDL_SOURCES = [ - "PUtilityProcess.ipdl", - ] -diff --git a/js/moz.configure b/js/moz.configure -index 4f9bb8992f..d53c672aa0 100644 ---- a/js/moz.configure -+++ b/js/moz.configure -@@ -184,7 +184,7 @@ def report_deprecated(value): - # ======================================================= - option( - "--enable-simulator", -- choices=("arm", "arm64", "mips32", "mips64", "loong64"), -+ choices=("arm", "arm64", "mips32", "mips64", "loong64", "riscv64"), - nargs=1, - help="Enable a JIT code simulator for the specified architecture", - ) -@@ -201,7 +201,7 @@ def simulator(jit_enabled, simulator_enabled, target): - if target.cpu != "x86": - die("The %s simulator only works on x86." % sim_cpu) - -- if sim_cpu in ("arm64", "mips64", "loong64"): -+ if sim_cpu in ("arm64", "mips64", "loong64", "riscv64"): - if target.cpu != "x86_64" and target.cpu != "aarch64": - die("The %s simulator only works on x86-64 or arm64." % sim_cpu) - -@@ -214,12 +214,14 @@ set_config("JS_SIMULATOR_ARM64", simulator.arm64) - set_config("JS_SIMULATOR_MIPS32", simulator.mips32) - set_config("JS_SIMULATOR_MIPS64", simulator.mips64) - set_config("JS_SIMULATOR_LOONG64", simulator.loong64) -+set_config("JS_SIMULATOR_RISCV64", simulator.riscv64) - set_define("JS_SIMULATOR", depends_if(simulator)(lambda x: True)) - set_define("JS_SIMULATOR_ARM", simulator.arm) - set_define("JS_SIMULATOR_ARM64", simulator.arm64) - set_define("JS_SIMULATOR_MIPS32", simulator.mips32) - set_define("JS_SIMULATOR_MIPS64", simulator.mips64) - set_define("JS_SIMULATOR_LOONG64", simulator.loong64) -+set_define("JS_SIMULATOR_RISCV64", simulator.riscv64) - - - @depends("--enable-jit", simulator, target) -@@ -244,6 +246,7 @@ set_config("JS_CODEGEN_ARM64", jit_codegen.arm64) - set_config("JS_CODEGEN_MIPS32", jit_codegen.mips32) - set_config("JS_CODEGEN_MIPS64", jit_codegen.mips64) - set_config("JS_CODEGEN_LOONG64", jit_codegen.loong64) -+set_config("JS_CODEGEN_RISCV64", jit_codegen.riscv64) - set_config("JS_CODEGEN_X86", jit_codegen.x86) - set_config("JS_CODEGEN_X64", jit_codegen.x64) - set_define("JS_CODEGEN_NONE", jit_codegen.none) -@@ -252,6 +255,7 @@ set_define("JS_CODEGEN_ARM64", jit_codegen.arm64) - set_define("JS_CODEGEN_MIPS32", jit_codegen.mips32) - set_define("JS_CODEGEN_MIPS64", jit_codegen.mips64) - set_define("JS_CODEGEN_LOONG64", jit_codegen.loong64) -+set_define("JS_CODEGEN_RISCV64", jit_codegen.riscv64) - set_define("JS_CODEGEN_X86", jit_codegen.x86) - set_define("JS_CODEGEN_X64", jit_codegen.x64) - -diff --git a/js/src/builtin/TestingFunctions.cpp b/js/src/builtin/TestingFunctions.cpp -index 2b8de6284f..1b9b4b62c7 100644 ---- a/js/src/builtin/TestingFunctions.cpp -+++ b/js/src/builtin/TestingFunctions.cpp -@@ -426,6 +426,24 @@ static bool GetBuildConfiguration(JSContext* cx, unsigned argc, Value* vp) { - return false; - } - -+#ifdef JS_CODEGEN_RISCV64 -+ value = BooleanValue(true); -+#else -+ value = BooleanValue(false); -+#endif -+ if (!JS_SetProperty(cx, info, "riscv64", value)) { -+ return false; -+ } -+ -+#ifdef JS_SIMULATOR_RISCV64 -+ value = BooleanValue(true); -+#else -+ value = BooleanValue(false); -+#endif -+ if (!JS_SetProperty(cx, info, "riscv64-simulator", value)) { -+ return false; -+ } -+ - #ifdef JS_SIMULATOR - value = BooleanValue(true); - #else -diff --git a/js/src/jit/Assembler.h b/js/src/jit/Assembler.h -index 04dcdc647e..2081f254b0 100644 ---- a/js/src/jit/Assembler.h -+++ b/js/src/jit/Assembler.h -@@ -19,6 +19,8 @@ - # include "jit/mips32/Assembler-mips32.h" - #elif defined(JS_CODEGEN_MIPS64) - # include "jit/mips64/Assembler-mips64.h" -+#elif defined(JS_CODEGEN_RISCV64) -+# include "jit/riscv64/Assembler-riscv64.h" - #elif defined(JS_CODEGEN_LOONG64) - # include "jit/loong64/Assembler-loong64.h" - #elif defined(JS_CODEGEN_NONE) -diff --git a/js/src/jit/CodeGenerator.h b/js/src/jit/CodeGenerator.h -index 67453d3cd3..82e58d2a16 100644 ---- a/js/src/jit/CodeGenerator.h -+++ b/js/src/jit/CodeGenerator.h -@@ -26,6 +26,8 @@ - # include "jit/mips64/CodeGenerator-mips64.h" - #elif defined(JS_CODEGEN_LOONG64) - # include "jit/loong64/CodeGenerator-loong64.h" -+#elif defined(JS_CODEGEN_RISCV64) -+# include "jit/riscv64/CodeGenerator-riscv64.h" - #elif defined(JS_CODEGEN_NONE) - # include "jit/none/CodeGenerator-none.h" - #else -diff --git a/js/src/jit/FlushICache.h b/js/src/jit/FlushICache.h -index 42b1fb045c..feeae3c793 100644 ---- a/js/src/jit/FlushICache.h -+++ b/js/src/jit/FlushICache.h -@@ -25,7 +25,7 @@ inline void FlushICache(void* code, size_t size, - - #elif (defined(JS_CODEGEN_ARM) || defined(JS_CODEGEN_ARM64)) || \ - (defined(JS_CODEGEN_MIPS32) || defined(JS_CODEGEN_MIPS64)) || \ -- defined(JS_CODEGEN_LOONG64) -+ defined(JS_CODEGEN_LOONG64) || defined(JS_CODEGEN_RISCV64) - - extern void FlushICache(void* code, size_t size, bool codeIsThreadLocal = true); - -diff --git a/js/src/jit/LIR.h b/js/src/jit/LIR.h -index 66c665b5ba..016c8246f7 100644 ---- a/js/src/jit/LIR.h -+++ b/js/src/jit/LIR.h -@@ -1933,6 +1933,8 @@ AnyRegister LAllocation::toRegister() const { - # include "jit/mips64/LIR-mips64.h" - # endif - # include "jit/mips-shared/LIR-mips-shared.h" -+#elif defined(JS_CODEGEN_RISCV64) -+# include "jit/riscv64/LIR-riscv64.h" - #elif defined(JS_CODEGEN_NONE) - # include "jit/none/LIR-none.h" - #else -diff --git a/js/src/jit/Lowering.h b/js/src/jit/Lowering.h -index a04d09c446..21094a616e 100644 ---- a/js/src/jit/Lowering.h -+++ b/js/src/jit/Lowering.h -@@ -23,6 +23,8 @@ - # include "jit/mips32/Lowering-mips32.h" - #elif defined(JS_CODEGEN_MIPS64) - # include "jit/mips64/Lowering-mips64.h" -+#elif defined(JS_CODEGEN_RISCV64) -+# include "jit/riscv64/Lowering-riscv64.h" - #elif defined(JS_CODEGEN_LOONG64) - # include "jit/loong64/Lowering-loong64.h" - #elif defined(JS_CODEGEN_NONE) -diff --git a/js/src/jit/MacroAssembler-inl.h b/js/src/jit/MacroAssembler-inl.h -index 5ed4ac7458..1c208e676d 100644 ---- a/js/src/jit/MacroAssembler-inl.h -+++ b/js/src/jit/MacroAssembler-inl.h -@@ -39,6 +39,8 @@ - # include "jit/mips64/MacroAssembler-mips64-inl.h" - #elif defined(JS_CODEGEN_LOONG64) - # include "jit/loong64/MacroAssembler-loong64-inl.h" -+#elif defined(JS_CODEGEN_RISCV64) -+# include "jit/riscv64/MacroAssembler-riscv64-inl.h" - #elif !defined(JS_CODEGEN_NONE) - # error "Unknown architecture!" - #endif -diff --git a/js/src/jit/MacroAssembler.cpp b/js/src/jit/MacroAssembler.cpp -index 3abc601bec..0665601509 100644 ---- a/js/src/jit/MacroAssembler.cpp -+++ b/js/src/jit/MacroAssembler.cpp -@@ -4145,6 +4145,8 @@ void MacroAssembler::emitPreBarrierFastPath(JSRuntime* rt, MIRType type, - ma_dsll(temp1, temp1, temp3); - #elif JS_CODEGEN_LOONG64 - as_sll_d(temp1, temp1, temp3); -+#elif JS_CODEGEN_RISCV64 -+ MOZ_CRASH(); - #elif JS_CODEGEN_NONE - MOZ_CRASH(); - #else -diff --git a/js/src/jit/MacroAssembler.h b/js/src/jit/MacroAssembler.h -index 5fa8f40bd1..3395a139d3 100644 ---- a/js/src/jit/MacroAssembler.h -+++ b/js/src/jit/MacroAssembler.h -@@ -25,6 +25,8 @@ - # include "jit/mips32/MacroAssembler-mips32.h" - #elif defined(JS_CODEGEN_MIPS64) - # include "jit/mips64/MacroAssembler-mips64.h" -+#elif defined(JS_CODEGEN_RISCV64) -+# include "jit/riscv64/MacroAssembler-riscv64.h" - #elif defined(JS_CODEGEN_LOONG64) - # include "jit/loong64/MacroAssembler-loong64.h" - #elif defined(JS_CODEGEN_NONE) -@@ -94,8 +96,8 @@ - // } - // ////}}} check_macroassembler_style - --#define ALL_ARCH mips32, mips64, arm, arm64, x86, x64, loong64 --#define ALL_SHARED_ARCH arm, arm64, loong64, x86_shared, mips_shared -+#define ALL_ARCH mips32, mips64, arm, arm64, x86, x64, loong64, riscv64 -+#define ALL_SHARED_ARCH arm, arm64, loong64, riscv64, x86_shared, mips_shared - - // * How this macro works: - // -@@ -142,6 +144,7 @@ - #define DEFINED_ON_mips64 - #define DEFINED_ON_mips_shared - #define DEFINED_ON_loong64 -+#define DEFINED_ON_riscv64 - #define DEFINED_ON_none - - // Specialize for each architecture. -@@ -174,6 +177,9 @@ - #elif defined(JS_CODEGEN_LOONG64) - # undef DEFINED_ON_loong64 - # define DEFINED_ON_loong64 define -+#elif defined(JS_CODEGEN_RISCV64) -+# undef DEFINED_ON_riscv64 -+# define DEFINED_ON_riscv64 define - #elif defined(JS_CODEGEN_NONE) - # undef DEFINED_ON_none - # define DEFINED_ON_none crash -@@ -491,10 +497,10 @@ class MacroAssembler : public MacroAssemblerSpecific { - - // The size of the area used by PushRegsInMask. - size_t PushRegsInMaskSizeInBytes(LiveRegisterSet set) -- DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); -+ DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared, riscv64); - - void PushRegsInMask(LiveRegisterSet set) -- DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); -+ DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared, riscv64); - void PushRegsInMask(LiveGeneralRegisterSet set); - - // Like PushRegsInMask, but instead of pushing the registers, store them to -@@ -505,12 +511,12 @@ class MacroAssembler : public MacroAssemblerSpecific { - // must point to either the lowest address in the save area, or some address - // below that. - void storeRegsInMask(LiveRegisterSet set, Address dest, Register scratch) -- DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); -+ DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared, riscv64); - - void PopRegsInMask(LiveRegisterSet set); - void PopRegsInMask(LiveGeneralRegisterSet set); - void PopRegsInMaskIgnore(LiveRegisterSet set, LiveRegisterSet ignore) -- DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); -+ DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared, riscv64); - - // =============================================================== - // Stack manipulation functions -- single registers/values. -@@ -543,7 +549,7 @@ class MacroAssembler : public MacroAssemblerSpecific { - void Pop(FloatRegister t) PER_SHARED_ARCH; - void Pop(const ValueOperand& val) PER_SHARED_ARCH; - void PopFlags() DEFINED_ON(x86_shared); -- void PopStackPtr() DEFINED_ON(arm, mips_shared, x86_shared, loong64); -+ void PopStackPtr() DEFINED_ON(arm, mips_shared, x86_shared, loong64, riscv64); - void popRooted(VMFunctionData::RootType rootType, Register cellReg, - const ValueOperand& valueReg); - -@@ -601,8 +607,9 @@ class MacroAssembler : public MacroAssemblerSpecific { - void callAndPushReturnAddress(Label* label) DEFINED_ON(x86_shared); - - // These do not adjust framePushed(). -- void pushReturnAddress() DEFINED_ON(mips_shared, arm, arm64, loong64); -- void popReturnAddress() DEFINED_ON(mips_shared, arm, arm64, loong64); -+ void pushReturnAddress() -+ DEFINED_ON(mips_shared, arm, arm64, loong64, riscv64); -+ void popReturnAddress() DEFINED_ON(mips_shared, arm, arm64, loong64, riscv64); - - // Useful for dealing with two-valued returns. - void moveRegPair(Register src0, Register src1, Register dst0, Register dst1, -@@ -633,10 +640,10 @@ class MacroAssembler : public MacroAssemblerSpecific { - // Note: "Near" applies to ARM64 where the target must be within 1 MB (this is - // release-asserted). - CodeOffset moveNearAddressWithPatch(Register dest) -- DEFINED_ON(x86, x64, arm, arm64, loong64, mips_shared); -+ DEFINED_ON(x86, x64, arm, arm64, loong64, mips_shared, riscv64); - static void patchNearAddressMove(CodeLocationLabel loc, - CodeLocationLabel target) -- DEFINED_ON(x86, x64, arm, arm64, loong64, mips_shared); -+ DEFINED_ON(x86, x64, arm, arm64, loong64, mips_shared, riscv64); - - public: - // =============================================================== -@@ -1045,17 +1052,17 @@ class MacroAssembler : public MacroAssemblerSpecific { - inline void addPtr(ImmWord imm, Register dest) PER_ARCH; - inline void addPtr(ImmPtr imm, Register dest); - inline void addPtr(Imm32 imm, const Address& dest) -- DEFINED_ON(mips_shared, arm, arm64, x86, x64, loong64); -+ DEFINED_ON(mips_shared, arm, arm64, x86, x64, loong64, riscv64); - inline void addPtr(Imm32 imm, const AbsoluteAddress& dest) - DEFINED_ON(x86, x64); - inline void addPtr(const Address& src, Register dest) -- DEFINED_ON(mips_shared, arm, arm64, x86, x64, loong64); -+ DEFINED_ON(mips_shared, arm, arm64, x86, x64, loong64, riscv64); - - inline void add64(Register64 src, Register64 dest) PER_ARCH; - inline void add64(Imm32 imm, Register64 dest) PER_ARCH; - inline void add64(Imm64 imm, Register64 dest) PER_ARCH; - inline void add64(const Operand& src, Register64 dest) -- DEFINED_ON(x64, mips64, loong64); -+ DEFINED_ON(x64, mips64, loong64, riscv64); - - inline void addFloat32(FloatRegister src, FloatRegister dest) PER_SHARED_ARCH; - -@@ -1074,16 +1081,16 @@ class MacroAssembler : public MacroAssemblerSpecific { - - inline void subPtr(Register src, Register dest) PER_ARCH; - inline void subPtr(Register src, const Address& dest) -- DEFINED_ON(mips_shared, arm, arm64, x86, x64, loong64); -+ DEFINED_ON(mips_shared, arm, arm64, x86, x64, loong64, riscv64); - inline void subPtr(Imm32 imm, Register dest) PER_ARCH; - inline void subPtr(ImmWord imm, Register dest) DEFINED_ON(x64); - inline void subPtr(const Address& addr, Register dest) -- DEFINED_ON(mips_shared, arm, arm64, x86, x64, loong64); -+ DEFINED_ON(mips_shared, arm, arm64, x86, x64, loong64, riscv64); - - inline void sub64(Register64 src, Register64 dest) PER_ARCH; - inline void sub64(Imm64 imm, Register64 dest) PER_ARCH; - inline void sub64(const Operand& src, Register64 dest) -- DEFINED_ON(x64, mips64, loong64); -+ DEFINED_ON(x64, mips64, loong64, riscv64); - - inline void subFloat32(FloatRegister src, FloatRegister dest) PER_SHARED_ARCH; - -@@ -1099,10 +1106,11 @@ class MacroAssembler : public MacroAssemblerSpecific { - - inline void mul64(const Operand& src, const Register64& dest) DEFINED_ON(x64); - inline void mul64(const Operand& src, const Register64& dest, -- const Register temp) DEFINED_ON(x64, mips64, loong64); -+ const Register temp) -+ DEFINED_ON(x64, mips64, loong64, riscv64); - inline void mul64(Imm64 imm, const Register64& dest) PER_ARCH; - inline void mul64(Imm64 imm, const Register64& dest, const Register temp) -- DEFINED_ON(x86, x64, arm, mips32, mips64, loong64); -+ DEFINED_ON(x86, x64, arm, mips32, mips64, loong64, riscv64); - inline void mul64(const Register64& src, const Register64& dest, - const Register temp) PER_ARCH; - inline void mul64(const Register64& src1, const Register64& src2, -@@ -1116,14 +1124,14 @@ class MacroAssembler : public MacroAssemblerSpecific { - inline void mulDouble(FloatRegister src, FloatRegister dest) PER_SHARED_ARCH; - - inline void mulDoublePtr(ImmPtr imm, Register temp, FloatRegister dest) -- DEFINED_ON(mips_shared, arm, arm64, x86, x64, loong64); -+ DEFINED_ON(mips_shared, arm, arm64, x86, x64, loong64, riscv64); - - // Perform an integer division, returning the integer part rounded toward - // zero. rhs must not be zero, and the division must not overflow. - // - // On ARM, the chip must have hardware division instructions. - inline void quotient32(Register rhs, Register srcDest, bool isUnsigned) -- DEFINED_ON(mips_shared, arm, arm64, loong64); -+ DEFINED_ON(mips_shared, arm, arm64, loong64, riscv64); - - // As above, but srcDest must be eax and tempEdx must be edx. - inline void quotient32(Register rhs, Register srcDest, Register tempEdx, -@@ -1134,7 +1142,7 @@ class MacroAssembler : public MacroAssemblerSpecific { - // - // On ARM, the chip must have hardware division instructions. - inline void remainder32(Register rhs, Register srcDest, bool isUnsigned) -- DEFINED_ON(mips_shared, arm, arm64, loong64); -+ DEFINED_ON(mips_shared, arm, arm64, loong64, riscv64); - - // As above, but srcDest must be eax and tempEdx must be edx. - inline void remainder32(Register rhs, Register srcDest, Register tempEdx, -@@ -1149,7 +1157,7 @@ class MacroAssembler : public MacroAssemblerSpecific { - // rhs is preserved, srdDest is clobbered. - void flexibleRemainder32(Register rhs, Register srcDest, bool isUnsigned, - const LiveRegisterSet& volatileLiveRegs) -- DEFINED_ON(mips_shared, arm, arm64, x86_shared, loong64); -+ DEFINED_ON(mips_shared, arm, arm64, x86_shared, loong64, riscv64); - - // Perform an integer division, returning the integer part rounded toward - // zero. rhs must not be zero, and the division must not overflow. -@@ -1160,7 +1168,7 @@ class MacroAssembler : public MacroAssemblerSpecific { - // rhs is preserved, srdDest is clobbered. - void flexibleQuotient32(Register rhs, Register srcDest, bool isUnsigned, - const LiveRegisterSet& volatileLiveRegs) -- DEFINED_ON(mips_shared, arm, arm64, x86_shared, loong64); -+ DEFINED_ON(mips_shared, arm, arm64, x86_shared, loong64, riscv64); - - // Perform an integer division, returning the integer part rounded toward - // zero. rhs must not be zero, and the division must not overflow. The -@@ -1173,7 +1181,7 @@ class MacroAssembler : public MacroAssemblerSpecific { - void flexibleDivMod32(Register rhs, Register srcDest, Register remOutput, - bool isUnsigned, - const LiveRegisterSet& volatileLiveRegs) -- DEFINED_ON(mips_shared, arm, arm64, x86_shared, loong64); -+ DEFINED_ON(mips_shared, arm, arm64, x86_shared, loong64, riscv64); - - inline void divFloat32(FloatRegister src, FloatRegister dest) PER_SHARED_ARCH; - inline void divDouble(FloatRegister src, FloatRegister dest) PER_SHARED_ARCH; -@@ -1380,7 +1388,7 @@ class MacroAssembler : public MacroAssemblerSpecific { - - template <typename T1, typename T2> - inline void cmp32Set(Condition cond, T1 lhs, T2 rhs, Register dest) -- DEFINED_ON(x86_shared, arm, arm64, mips32, mips64, loong64); -+ DEFINED_ON(x86_shared, arm, arm64, mips32, mips64, loong64, riscv64); - - // Only the NotEqual and Equal conditions are allowed. - inline void cmp64Set(Condition cond, Address lhs, Imm64 rhs, -@@ -1415,10 +1423,10 @@ class MacroAssembler : public MacroAssemblerSpecific { - - inline void branch32(Condition cond, const AbsoluteAddress& lhs, Register rhs, - Label* label) -- DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); -+ DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64); - inline void branch32(Condition cond, const AbsoluteAddress& lhs, Imm32 rhs, - Label* label) -- DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); -+ DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64); - - inline void branch32(Condition cond, const BaseIndex& lhs, Register rhs, - Label* label) DEFINED_ON(arm, x86_shared); -@@ -1432,7 +1440,7 @@ class MacroAssembler : public MacroAssemblerSpecific { - - inline void branch32(Condition cond, wasm::SymbolicAddress lhs, Imm32 rhs, - Label* label) -- DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); -+ DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64); - - // The supported condition are Equal, NotEqual, LessThan(orEqual), - // GreaterThan(orEqual), Below(orEqual) and Above(orEqual). When a fail label -@@ -1483,14 +1491,14 @@ class MacroAssembler : public MacroAssemblerSpecific { - - inline void branchPtr(Condition cond, const AbsoluteAddress& lhs, - Register rhs, Label* label) -- DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); -+ DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64); - inline void branchPtr(Condition cond, const AbsoluteAddress& lhs, ImmWord rhs, - Label* label) -- DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); -+ DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64); - - inline void branchPtr(Condition cond, wasm::SymbolicAddress lhs, Register rhs, - Label* label) -- DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); -+ DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64); - - // Given a pointer to a GC Cell, retrieve the StoreBuffer pointer from its - // chunk header, or nullptr if it is in the tenured heap. -@@ -1498,7 +1506,7 @@ class MacroAssembler : public MacroAssemblerSpecific { - - void branchPtrInNurseryChunk(Condition cond, Register ptr, Register temp, - Label* label) -- DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); -+ DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64); - void branchPtrInNurseryChunk(Condition cond, const Address& address, - Register temp, Label* label) DEFINED_ON(x86); - void branchValueIsNurseryCell(Condition cond, const Address& address, -@@ -1520,10 +1528,10 @@ class MacroAssembler : public MacroAssemblerSpecific { - // x64 variants will do this only in the int64_t range. - inline void branchTruncateFloat32MaybeModUint32(FloatRegister src, - Register dest, Label* fail) -- DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); -+ DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64); - inline void branchTruncateDoubleMaybeModUint32(FloatRegister src, - Register dest, Label* fail) -- DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); -+ DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64); - - // Truncate a double/float32 to intptr and when it doesn't fit jump to the - // failure label. -@@ -1536,10 +1544,10 @@ class MacroAssembler : public MacroAssemblerSpecific { - // failure label. - inline void branchTruncateFloat32ToInt32(FloatRegister src, Register dest, - Label* fail) -- DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); -+ DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64); - inline void branchTruncateDoubleToInt32(FloatRegister src, Register dest, - Label* fail) -- DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); -+ DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64); - - inline void branchDouble(DoubleCondition cond, FloatRegister lhs, - FloatRegister rhs, Label* label) PER_SHARED_ARCH; -@@ -1596,7 +1604,7 @@ class MacroAssembler : public MacroAssemblerSpecific { - Label* label) PER_SHARED_ARCH; - inline void branchTest32(Condition cond, const AbsoluteAddress& lhs, - Imm32 rhs, Label* label) -- DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); -+ DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64); - - template <class L> - inline void branchTestPtr(Condition cond, Register lhs, Register rhs, -@@ -1757,7 +1765,7 @@ class MacroAssembler : public MacroAssemblerSpecific { - inline void branchTestInt32(Condition cond, Register tag, - Label* label) PER_SHARED_ARCH; - inline void branchTestDouble(Condition cond, Register tag, Label* label) -- DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); -+ DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared, riscv64); - inline void branchTestNumber(Condition cond, Register tag, - Label* label) PER_SHARED_ARCH; - inline void branchTestBoolean(Condition cond, Register tag, -@@ -1789,7 +1797,7 @@ class MacroAssembler : public MacroAssemblerSpecific { - Label* label) PER_SHARED_ARCH; - inline void branchTestUndefined(Condition cond, const ValueOperand& value, - Label* label) -- DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); -+ DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared, riscv64); - - inline void branchTestInt32(Condition cond, const Address& address, - Label* label) PER_SHARED_ARCH; -@@ -1797,7 +1805,7 @@ class MacroAssembler : public MacroAssemblerSpecific { - Label* label) PER_SHARED_ARCH; - inline void branchTestInt32(Condition cond, const ValueOperand& value, - Label* label) -- DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); -+ DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared, riscv64); - - inline void branchTestDouble(Condition cond, const Address& address, - Label* label) PER_SHARED_ARCH; -@@ -1805,11 +1813,11 @@ class MacroAssembler : public MacroAssemblerSpecific { - Label* label) PER_SHARED_ARCH; - inline void branchTestDouble(Condition cond, const ValueOperand& value, - Label* label) -- DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); -+ DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared, riscv64); - - inline void branchTestNumber(Condition cond, const ValueOperand& value, - Label* label) -- DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); -+ DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared, riscv64); - - inline void branchTestBoolean(Condition cond, const Address& address, - Label* label) PER_SHARED_ARCH; -@@ -1817,7 +1825,7 @@ class MacroAssembler : public MacroAssemblerSpecific { - Label* label) PER_SHARED_ARCH; - inline void branchTestBoolean(Condition cond, const ValueOperand& value, - Label* label) -- DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); -+ DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared, riscv64); - - inline void branchTestString(Condition cond, const Address& address, - Label* label) PER_SHARED_ARCH; -@@ -1825,7 +1833,7 @@ class MacroAssembler : public MacroAssemblerSpecific { - Label* label) PER_SHARED_ARCH; - inline void branchTestString(Condition cond, const ValueOperand& value, - Label* label) -- DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); -+ DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared, riscv64); - - inline void branchTestSymbol(Condition cond, const Address& address, - Label* label) PER_SHARED_ARCH; -@@ -1833,7 +1841,7 @@ class MacroAssembler : public MacroAssemblerSpecific { - Label* label) PER_SHARED_ARCH; - inline void branchTestSymbol(Condition cond, const ValueOperand& value, - Label* label) -- DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); -+ DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared, riscv64); - - inline void branchTestBigInt(Condition cond, const Address& address, - Label* label) PER_SHARED_ARCH; -@@ -1841,7 +1849,7 @@ class MacroAssembler : public MacroAssemblerSpecific { - Label* label) PER_SHARED_ARCH; - inline void branchTestBigInt(Condition cond, const ValueOperand& value, - Label* label) -- DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); -+ DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared, riscv64); - - inline void branchTestNull(Condition cond, const Address& address, - Label* label) PER_SHARED_ARCH; -@@ -1849,7 +1857,7 @@ class MacroAssembler : public MacroAssemblerSpecific { - Label* label) PER_SHARED_ARCH; - inline void branchTestNull(Condition cond, const ValueOperand& value, - Label* label) -- DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); -+ DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared, riscv64); - - // Clobbers the ScratchReg on x64. - inline void branchTestObject(Condition cond, const Address& address, -@@ -1858,7 +1866,7 @@ class MacroAssembler : public MacroAssemblerSpecific { - Label* label) PER_SHARED_ARCH; - inline void branchTestObject(Condition cond, const ValueOperand& value, - Label* label) -- DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); -+ DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared, riscv64); - - inline void branchTestGCThing(Condition cond, const Address& address, - Label* label) PER_SHARED_ARCH; -@@ -1869,7 +1877,7 @@ class MacroAssembler : public MacroAssemblerSpecific { - - inline void branchTestPrimitive(Condition cond, const ValueOperand& value, - Label* label) -- DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); -+ DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared, riscv64); - - inline void branchTestMagic(Condition cond, const Address& address, - Label* label) PER_SHARED_ARCH; -@@ -1878,7 +1886,7 @@ class MacroAssembler : public MacroAssemblerSpecific { - template <class L> - inline void branchTestMagic(Condition cond, const ValueOperand& value, - L label) -- DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); -+ DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared, riscv64); - - inline void branchTestMagic(Condition cond, const Address& valaddr, - JSWhyMagic why, Label* label) PER_ARCH; -@@ -1896,17 +1904,17 @@ class MacroAssembler : public MacroAssemblerSpecific { - // The type of the value should match the type of the method. - inline void branchTestInt32Truthy(bool truthy, const ValueOperand& value, - Label* label) -- DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); -+ DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared, riscv64); - inline void branchTestDoubleTruthy(bool truthy, FloatRegister reg, - Label* label) PER_SHARED_ARCH; - inline void branchTestBooleanTruthy(bool truthy, const ValueOperand& value, - Label* label) PER_ARCH; - inline void branchTestStringTruthy(bool truthy, const ValueOperand& value, - Label* label) -- DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); -+ DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared, riscv64); - inline void branchTestBigIntTruthy(bool truthy, const ValueOperand& value, - Label* label) -- DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared); -+ DEFINED_ON(arm, arm64, mips32, mips64, loong64, x86_shared, riscv64); - - // Create an unconditional branch to the address given as argument. - inline void branchToComputedAddress(const BaseIndex& address) PER_ARCH; -@@ -2008,11 +2016,11 @@ class MacroAssembler : public MacroAssemblerSpecific { - - inline void cmp32Move32(Condition cond, Register lhs, Register rhs, - Register src, Register dest) -- DEFINED_ON(arm, arm64, loong64, mips_shared, x86_shared); -+ DEFINED_ON(arm, arm64, loong64, mips_shared, x86_shared, riscv64); - - inline void cmp32Move32(Condition cond, Register lhs, const Address& rhs, - Register src, Register dest) -- DEFINED_ON(arm, arm64, loong64, mips_shared, x86_shared); -+ DEFINED_ON(arm, arm64, loong64, mips_shared, x86_shared, riscv64); - - inline void cmpPtrMovePtr(Condition cond, Register lhs, Register rhs, - Register src, Register dest) PER_ARCH; -@@ -2022,36 +2030,36 @@ class MacroAssembler : public MacroAssemblerSpecific { - - inline void cmp32Load32(Condition cond, Register lhs, const Address& rhs, - const Address& src, Register dest) -- DEFINED_ON(arm, arm64, loong64, mips_shared, x86_shared); -+ DEFINED_ON(arm, arm64, loong64, mips_shared, x86_shared, riscv64); - - inline void cmp32Load32(Condition cond, Register lhs, Register rhs, - const Address& src, Register dest) -- DEFINED_ON(arm, arm64, loong64, mips_shared, x86_shared); -+ DEFINED_ON(arm, arm64, loong64, mips_shared, x86_shared, riscv64); - - inline void cmp32LoadPtr(Condition cond, const Address& lhs, Imm32 rhs, - const Address& src, Register dest) -- DEFINED_ON(arm, arm64, loong64, mips_shared, x86, x64); -+ DEFINED_ON(arm, arm64, loong64, mips_shared, x86, x64, riscv64); - - inline void cmp32MovePtr(Condition cond, Register lhs, Imm32 rhs, - Register src, Register dest) -- DEFINED_ON(arm, arm64, loong64, mips_shared, x86, x64); -+ DEFINED_ON(arm, arm64, loong64, mips_shared, x86, x64, riscv64); - - inline void test32LoadPtr(Condition cond, const Address& addr, Imm32 mask, - const Address& src, Register dest) -- DEFINED_ON(arm, arm64, loong64, mips_shared, x86, x64); -+ DEFINED_ON(arm, arm64, loong64, mips_shared, x86, x64, riscv64); - - inline void test32MovePtr(Condition cond, const Address& addr, Imm32 mask, - Register src, Register dest) -- DEFINED_ON(arm, arm64, loong64, mips_shared, x86, x64); -+ DEFINED_ON(arm, arm64, loong64, mips_shared, x86, x64, riscv64); - - // Conditional move for Spectre mitigations. - inline void spectreMovePtr(Condition cond, Register src, Register dest) -- DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); -+ DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64); - - // Zeroes dest if the condition is true. - inline void spectreZeroRegister(Condition cond, Register scratch, - Register dest) -- DEFINED_ON(arm, arm64, mips_shared, x86_shared, loong64); -+ DEFINED_ON(arm, arm64, mips_shared, x86_shared, loong64, riscv64); - - // Performs a bounds check and zeroes the index register if out-of-bounds - // (to mitigate Spectre). -@@ -2063,17 +2071,17 @@ class MacroAssembler : public MacroAssemblerSpecific { - public: - inline void spectreBoundsCheck32(Register index, Register length, - Register maybeScratch, Label* failure) -- DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); -+ DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64); - inline void spectreBoundsCheck32(Register index, const Address& length, - Register maybeScratch, Label* failure) -- DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); -+ DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64); - - inline void spectreBoundsCheckPtr(Register index, Register length, - Register maybeScratch, Label* failure) -- DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); -+ DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64); - inline void spectreBoundsCheckPtr(Register index, const Address& length, - Register maybeScratch, Label* failure) -- DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64); -+ DEFINED_ON(arm, arm64, mips_shared, x86, x64, loong64, riscv64); - - // ======================================================================== - // Canonicalization primitives. -@@ -2087,10 +2095,10 @@ class MacroAssembler : public MacroAssemblerSpecific { - // ======================================================================== - // Memory access primitives. - inline void storeUncanonicalizedDouble(FloatRegister src, const Address& dest) -- DEFINED_ON(x86_shared, arm, arm64, mips32, mips64, loong64); -+ DEFINED_ON(x86_shared, arm, arm64, mips32, mips64, loong64, riscv64); - inline void storeUncanonicalizedDouble(FloatRegister src, - const BaseIndex& dest) -- DEFINED_ON(x86_shared, arm, arm64, mips32, mips64, loong64); -+ DEFINED_ON(x86_shared, arm, arm64, mips32, mips64, loong64, riscv64); - inline void storeUncanonicalizedDouble(FloatRegister src, const Operand& dest) - DEFINED_ON(x86_shared); - -@@ -2104,10 +2112,10 @@ class MacroAssembler : public MacroAssemblerSpecific { - - inline void storeUncanonicalizedFloat32(FloatRegister src, - const Address& dest) -- DEFINED_ON(x86_shared, arm, arm64, mips32, mips64, loong64); -+ DEFINED_ON(x86_shared, arm, arm64, mips32, mips64, loong64, riscv64); - inline void storeUncanonicalizedFloat32(FloatRegister src, - const BaseIndex& dest) -- DEFINED_ON(x86_shared, arm, arm64, mips32, mips64, loong64); -+ DEFINED_ON(x86_shared, arm, arm64, mips32, mips64, loong64, riscv64); - inline void storeUncanonicalizedFloat32(FloatRegister src, - const Operand& dest) - DEFINED_ON(x86_shared); -@@ -3508,10 +3516,10 @@ class MacroAssembler : public MacroAssemblerSpecific { - - // temp required on x86 and x64; must be undefined on mips64 and loong64. - void convertUInt64ToFloat32(Register64 src, FloatRegister dest, Register temp) -- DEFINED_ON(arm64, mips64, loong64, x64, x86); -+ DEFINED_ON(arm64, mips64, loong64, x64, x86, riscv64); - - void convertInt64ToFloat32(Register64 src, FloatRegister dest) -- DEFINED_ON(arm64, mips64, loong64, x64, x86); -+ DEFINED_ON(arm64, mips64, loong64, x64, x86, riscv64); - - bool convertUInt64ToDoubleNeedsTemp() PER_ARCH; - -@@ -3563,19 +3571,19 @@ class MacroAssembler : public MacroAssemblerSpecific { - - void wasmBoundsCheck32(Condition cond, Register index, - Register boundsCheckLimit, Label* ok) -- DEFINED_ON(arm, arm64, mips32, mips64, x86_shared, loong64); -+ DEFINED_ON(arm, arm64, mips32, mips64, x86_shared, loong64, riscv64); - - void wasmBoundsCheck32(Condition cond, Register index, - Address boundsCheckLimit, Label* ok) -- DEFINED_ON(arm, arm64, mips32, mips64, x86_shared, loong64); -+ DEFINED_ON(arm, arm64, mips32, mips64, x86_shared, loong64, riscv64); - - void wasmBoundsCheck64(Condition cond, Register64 index, - Register64 boundsCheckLimit, Label* ok) -- DEFINED_ON(arm64, mips64, x64, x86, arm, loong64); -+ DEFINED_ON(arm64, mips64, x64, x86, arm, loong64, riscv64); - - void wasmBoundsCheck64(Condition cond, Register64 index, - Address boundsCheckLimit, Label* ok) -- DEFINED_ON(arm64, mips64, x64, x86, arm, loong64); -+ DEFINED_ON(arm64, mips64, x64, x86, arm, loong64, riscv64); - - // Each wasm load/store instruction appends its own wasm::Trap::OutOfBounds. - void wasmLoad(const wasm::MemoryAccessDesc& access, Operand srcAddr, -@@ -3668,7 +3676,7 @@ class MacroAssembler : public MacroAssemblerSpecific { - void oolWasmTruncateCheckF64ToI32(FloatRegister input, Register output, - TruncFlags flags, wasm::BytecodeOffset off, - Label* rejoin) -- DEFINED_ON(arm, arm64, x86_shared, mips_shared, loong64); -+ DEFINED_ON(arm, arm64, x86_shared, mips_shared, loong64, riscv64); - - void wasmTruncateFloat32ToUInt32(FloatRegister input, Register output, - bool isSaturating, Label* oolEntry) PER_ARCH; -@@ -3678,35 +3686,35 @@ class MacroAssembler : public MacroAssemblerSpecific { - void oolWasmTruncateCheckF32ToI32(FloatRegister input, Register output, - TruncFlags flags, wasm::BytecodeOffset off, - Label* rejoin) -- DEFINED_ON(arm, arm64, x86_shared, mips_shared, loong64); -+ DEFINED_ON(arm, arm64, x86_shared, mips_shared, loong64, riscv64); - - // The truncate-to-int64 methods will always bind the `oolRejoin` label - // after the last emitted instruction. - void wasmTruncateDoubleToInt64(FloatRegister input, Register64 output, - bool isSaturating, Label* oolEntry, - Label* oolRejoin, FloatRegister tempDouble) -- DEFINED_ON(arm64, x86, x64, mips64, loong64); -+ DEFINED_ON(arm64, x86, x64, mips64, loong64, riscv64); - void wasmTruncateDoubleToUInt64(FloatRegister input, Register64 output, - bool isSaturating, Label* oolEntry, - Label* oolRejoin, FloatRegister tempDouble) -- DEFINED_ON(arm64, x86, x64, mips64, loong64); -+ DEFINED_ON(arm64, x86, x64, mips64, loong64, riscv64); - void oolWasmTruncateCheckF64ToI64(FloatRegister input, Register64 output, - TruncFlags flags, wasm::BytecodeOffset off, - Label* rejoin) -- DEFINED_ON(arm, arm64, x86_shared, mips_shared, loong64); -+ DEFINED_ON(arm, arm64, x86_shared, mips_shared, loong64, riscv64); - - void wasmTruncateFloat32ToInt64(FloatRegister input, Register64 output, - bool isSaturating, Label* oolEntry, - Label* oolRejoin, FloatRegister tempDouble) -- DEFINED_ON(arm64, x86, x64, mips64, loong64); -+ DEFINED_ON(arm64, x86, x64, mips64, loong64, riscv64); - void wasmTruncateFloat32ToUInt64(FloatRegister input, Register64 output, - bool isSaturating, Label* oolEntry, - Label* oolRejoin, FloatRegister tempDouble) -- DEFINED_ON(arm64, x86, x64, mips64, loong64); -+ DEFINED_ON(arm64, x86, x64, mips64, loong64, riscv64); - void oolWasmTruncateCheckF32ToI64(FloatRegister input, Register64 output, - TruncFlags flags, wasm::BytecodeOffset off, - Label* rejoin) -- DEFINED_ON(arm, arm64, x86_shared, mips_shared, loong64); -+ DEFINED_ON(arm, arm64, x86_shared, mips_shared, loong64, riscv64); - - void loadWasmGlobalPtr(uint32_t globalDataOffset, Register dest); - -@@ -3764,7 +3772,7 @@ class MacroAssembler : public MacroAssemblerSpecific { - // convention, which requires predictable high bits. In practice, this means - // that the 32-bit value will be zero-extended or sign-extended to 64 bits as - // appropriate for the platform. -- void widenInt32(Register r) DEFINED_ON(arm64, x64, mips64, loong64); -+ void widenInt32(Register r) DEFINED_ON(arm64, x64, mips64, loong64, riscv64); - - // As enterFakeExitFrame(), but using register conventions appropriate for - // wasm stubs. -@@ -5006,7 +5014,7 @@ class MacroAssembler : public MacroAssemblerSpecific { - inline void addStackPtrTo(T t); - - void subFromStackPtr(Imm32 imm32) -- DEFINED_ON(mips32, mips64, loong64, arm, x86, x64); -+ DEFINED_ON(mips32, mips64, loong64, arm, x86, x64, riscv64); - void subFromStackPtr(Register reg); - - template <typename T> -diff --git a/js/src/jit/MoveEmitter.h b/js/src/jit/MoveEmitter.h -index a51cbc100a..ea4d92bedc 100644 ---- a/js/src/jit/MoveEmitter.h -+++ b/js/src/jit/MoveEmitter.h -@@ -17,6 +17,8 @@ - # include "jit/mips32/MoveEmitter-mips32.h" - #elif defined(JS_CODEGEN_MIPS64) - # include "jit/mips64/MoveEmitter-mips64.h" -+#elif defined(JS_CODEGEN_RISCV64) -+# include "jit/riscv64/MoveEmitter-riscv64.h" - #elif defined(JS_CODEGEN_LOONG64) - # include "jit/loong64/MoveEmitter-loong64.h" - #elif defined(JS_CODEGEN_NONE) -diff --git a/js/src/jit/Registers.h b/js/src/jit/Registers.h -index 2c1cec0771..baf0630e07 100644 ---- a/js/src/jit/Registers.h -+++ b/js/src/jit/Registers.h -@@ -20,6 +20,8 @@ - # include "jit/mips32/Architecture-mips32.h" - #elif defined(JS_CODEGEN_MIPS64) - # include "jit/mips64/Architecture-mips64.h" -+#elif defined(JS_CODEGEN_RISCV64) -+# include "jit/riscv64/Architecture-riscv64.h" - #elif defined(JS_CODEGEN_LOONG64) - # include "jit/loong64/Architecture-loong64.h" - #elif defined(JS_CODEGEN_NONE) -diff --git a/js/src/jit/SharedICHelpers-inl.h b/js/src/jit/SharedICHelpers-inl.h -index 60a77956f0..242f5d3f27 100644 ---- a/js/src/jit/SharedICHelpers-inl.h -+++ b/js/src/jit/SharedICHelpers-inl.h -@@ -17,6 +17,8 @@ - # include "jit/arm64/SharedICHelpers-arm64-inl.h" - #elif defined(JS_CODEGEN_MIPS32) || defined(JS_CODEGEN_MIPS64) - # include "jit/mips-shared/SharedICHelpers-mips-shared-inl.h" -+#elif defined(JS_CODEGEN_RISCV64) -+# include "jit/riscv64/SharedICHelpers-riscv64-inl.h" - #elif defined(JS_CODEGEN_LOONG64) - # include "jit/loong64/SharedICHelpers-loong64-inl.h" - #elif defined(JS_CODEGEN_NONE) -diff --git a/js/src/jit/SharedICHelpers.h b/js/src/jit/SharedICHelpers.h -index da8378ebae..bfe4a1b672 100644 ---- a/js/src/jit/SharedICHelpers.h -+++ b/js/src/jit/SharedICHelpers.h -@@ -17,6 +17,8 @@ - # include "jit/arm64/SharedICHelpers-arm64.h" - #elif defined(JS_CODEGEN_MIPS32) || defined(JS_CODEGEN_MIPS64) - # include "jit/mips-shared/SharedICHelpers-mips-shared.h" -+#elif defined(JS_CODEGEN_RISCV64) -+# include "jit/riscv64/SharedICHelpers-riscv64.h" - #elif defined(JS_CODEGEN_LOONG64) - # include "jit/loong64/SharedICHelpers-loong64.h" - #elif defined(JS_CODEGEN_NONE) -diff --git a/js/src/jit/SharedICRegisters.h b/js/src/jit/SharedICRegisters.h -index e29f21c28d..4091d9f595 100644 ---- a/js/src/jit/SharedICRegisters.h -+++ b/js/src/jit/SharedICRegisters.h -@@ -19,6 +19,8 @@ - # include "jit/mips32/SharedICRegisters-mips32.h" - #elif defined(JS_CODEGEN_MIPS64) - # include "jit/mips64/SharedICRegisters-mips64.h" -+#elif defined(JS_CODEGEN_RISCV64) -+# include "jit/riscv64/SharedICRegisters-riscv64.h" - #elif defined(JS_CODEGEN_LOONG64) - # include "jit/loong64/SharedICRegisters-loong64.h" - #elif defined(JS_CODEGEN_NONE) -diff --git a/js/src/jit/moz.build b/js/src/jit/moz.build -index 967146e32f..1519351bbb 100644 ---- a/js/src/jit/moz.build -+++ b/js/src/jit/moz.build -@@ -212,6 +212,13 @@ elif CONFIG["JS_CODEGEN_MIPS32"] or CONFIG["JS_CODEGEN_MIPS64"]: - ] - if CONFIG["JS_SIMULATOR_MIPS64"]: - UNIFIED_SOURCES += ["mips64/Simulator-mips64.cpp"] -+elif CONFIG["JS_CODEGEN_RISCV64"]: -+ UNIFIED_SOURCES += [ -+ "riscv64/Assembler-riscv64.cpp", -+ "riscv64/Trampoline-riscv64.cpp", -+ ] -+ if CONFIG["JS_SIMULATOR_RISC64"]: -+ UNIFIED_SOURCES += ["riscv64/Simulator-riscv64.cpp"] - elif CONFIG["JS_CODEGEN_LOONG64"]: - UNIFIED_SOURCES += [ - "loong64/Architecture-loong64.cpp", -@@ -225,7 +232,6 @@ elif CONFIG["JS_CODEGEN_LOONG64"]: - if CONFIG["JS_SIMULATOR_LOONG64"]: - UNIFIED_SOURCES += ["loong64/Simulator-loong64.cpp"] - -- - # Generate jit/MIROpsGenerated.h from jit/MIROps.yaml - GeneratedFile( - "MIROpsGenerated.h", -diff --git a/js/src/jit/riscv64/Architecture-riscv64.h b/js/src/jit/riscv64/Architecture-riscv64.h -new file mode 100644 -index 0000000000..a676dc142e ---- /dev/null -+++ b/js/src/jit/riscv64/Architecture-riscv64.h -@@ -0,0 +1,404 @@ -+/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- -+ * vim: set ts=8 sts=2 et sw=2 tw=80: -+ * This Source Code Form is subject to the terms of the Mozilla Public -+ * License, v. 2.0. If a copy of the MPL was not distributed with this -+ * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ -+ -+#ifndef jit_riscv64_Architecture_riscv64_h -+#define jit_riscv64_Architecture_riscv64_h -+ -+// JitSpewer.h is included through MacroAssembler implementations for other -+// platforms, so include it here to avoid inadvertent build bustage. -+#include "jit/JitSpewer.h" -+ -+#include "jit/shared/Architecture-shared.h" -+ -+namespace js { -+namespace jit { -+ -+static const uint32_t SimdMemoryAlignment = -+ 4; // Make it 4 to avoid a bunch of div-by-zero warnings -+static const uint32_t WasmStackAlignment = 8; -+static const uint32_t WasmTrapInstructionLength = 0; -+ -+// See comments in wasm::GenerateFunctionPrologue. -+static constexpr uint32_t WasmCheckedCallEntryOffset = 0u; -+static constexpr uint32_t WasmCheckedTailEntryOffset = 1u; -+ -+class Registers { -+ public: -+ enum RegisterID { -+ x0 = 0, -+ zero = 0, -+ x1 = 1, -+ ra = 1, -+ x2 = 2, -+ sp = 2, -+ x3 = 3, -+ gp = 3, -+ x4 = 4, -+ tp = 4, -+ x5 = 5, -+ t0 = 5, -+ x6 = 6, -+ t1 = 6, -+ x7 = 7, -+ t2 = 7, -+ x8 = 8, -+ fp = 8, -+ s0 = 8, -+ x9 = 9, -+ s1 = 9, -+ x10 = 10, -+ a0 = 10, -+ x11 = 11, -+ a1 = 11, -+ x12 = 12, -+ a2 = 12, -+ x13 = 13, -+ a3 = 13, -+ x14 = 14, -+ a4 = 14, -+ x15 = 15, -+ a5 = 15, -+ x16 = 16, -+ a6 = 16, -+ x17 = 17, -+ a7 = 17, -+ x18 = 18, -+ s2 = 18, -+ x19 = 19, -+ s3 = 19, -+ x20 = 20, -+ s4 = 20, -+ x21 = 21, -+ s5 = 21, -+ x22 = 22, -+ s6 = 22, -+ x23 = 23, -+ s7 = 23, -+ x24 = 24, -+ s8 = 24, -+ x25 = 25, -+ s9 = 25, -+ x26 = 26, -+ s10 = 26, -+ x27 = 27, -+ s11 = 27, -+ x28 = 28, -+ t3 = 28, -+ x29 = 29, -+ t4 = 29, -+ x30 = 30, -+ t5 = 30, -+ x31 = 31, -+ t6 = 31, -+ invalid_reg -+ }; -+ typedef uint8_t Code; -+ typedef RegisterID Encoding; -+ union RegisterContent { -+ uintptr_t r; -+ }; -+ -+ typedef uint32_t SetType; -+ -+ static uint32_t SetSize(SetType x) { -+ static_assert(sizeof(SetType) == 4, "SetType must be 32 bits"); -+ return mozilla::CountPopulation32(x); -+ } -+ static uint32_t FirstBit(SetType x) { -+ return mozilla::CountTrailingZeroes32(x); -+ } -+ static uint32_t LastBit(SetType x) { -+ return 31 - mozilla::CountLeadingZeroes32(x); -+ } -+ -+ static const char* GetName(uint32_t code) { -+ // clang-format off -+ static const char* const Names[] = { -+ "zero", "ra", "sp", "gp", "tp", "t0", "t1", "t2", -+ "fp", "s1", "a0", "a1", "a2", "a3", "a4", "a5", -+ "a6", "a7", "s2", "s3", "s4", "s5", "s6", "s7", -+ "s8", "s9", "s10", "s11", "t3", "t4", "t5", "t6"}; -+ // clang-format on -+ static_assert(Total == sizeof(Names) / sizeof(Names[0]), -+ "Table is the correct size"); -+ if (code >= Total) { -+ return "invalid"; -+ } -+ return Names[code]; -+ } -+ -+ static Code FromName(const char* name) { -+ for (size_t i = 0; i < Total; i++) { -+ if (strcmp(GetName(Code(i)), name) == 0) { -+ return Code(i); -+ } -+ } -+ return Invalid; -+ } -+ -+ static const Encoding StackPointer = sp; -+ static const Encoding Invalid = invalid_reg; -+ static const uint32_t Total = 32; -+ static const uint32_t TotalPhys = 32; -+ static const uint32_t Allocatable = 28; -+ static const SetType AllMask = 0xffffffff; -+ static const SetType ArgRegMask = -+ (1 << Registers::a0) | (1 << Registers::a1) | (1 << Registers::a2) | -+ (1 << Registers::a3) | (1 << Registers::a4) | (1 << Registers::a5) | -+ (1 << Registers::a6) | (1 << Registers::a7); -+ static const SetType VolatileMask = -+ (1 << Registers::a0) | (1 << Registers::a1) | (1 << Registers::a2) | -+ (1 << Registers::a3) | (1 << Registers::a4) | (1 << Registers::a5) | -+ (1 << Registers::a6) | (1 << Registers::a7) | (1 << Registers::t0) | -+ (1 << Registers::t1) | (1 << Registers::t2) | (1 << Registers::t3) | -+ (1 << Registers::t4) | (1 << Registers::t5) | (1 << Registers::t6); -+ static const SetType NonVolatileMask = -+ (1 << Registers::s0) | (1 << Registers::s1) | (1 << Registers::s2) | -+ (1 << Registers::s3) | (1 << Registers::s4) | (1 << Registers::s5) | -+ (1 << Registers::s6) | (1 << Registers::s7) | (1 << Registers::s8) | -+ (1 << Registers::s9) | (1 << Registers::s10) | (1 << Registers::s11); -+ static const SetType NonAllocatableMask = -+ (1 << Registers::zero) | (1 << Registers::sp) | (1 << Registers::tp) | -+ (1 << Registers::gp); -+ static const SetType AllocatableMask = AllMask & ~NonAllocatableMask; -+ static const SetType JSCallMask = 0; -+ static const SetType CallMask = 0; -+}; -+ -+typedef uint8_t PackedRegisterMask; -+ -+class FloatRegisters { -+ public: -+ enum FPRegisterID { -+ f0 = 0, -+ ft0 = 0, -+ f1 = 1, -+ ft1 = 1, -+ f2 = 2, -+ ft2 = 2, -+ f3 = 3, -+ ft3 = 3, -+ f4 = 4, -+ ft4 = 4, -+ f5 = 5, -+ ft5 = 5, -+ f6 = 6, -+ ft6 = 6, -+ f7 = 7, -+ ft7 = 7, -+ f8 = 8, -+ fs0 = 8, -+ f9 = 9, -+ fs1 = 9, -+ f10 = 10, -+ fa0 = 10, -+ f11 = 11, -+ fa1 = 11, -+ f12 = 12, -+ fa2 = 12, -+ f13 = 13, -+ fa3 = 13, -+ f14 = 14, -+ fa4 = 14, -+ f15 = 15, -+ fa5 = 15, -+ f16 = 16, -+ fa6 = 16, -+ f17 = 17, -+ fa7 = 17, -+ f18 = 18, -+ fs2 = 18, -+ f19 = 19, -+ fs3 = 19, -+ f20 = 20, -+ fs4 = 20, -+ f21 = 21, -+ fs5 = 21, -+ f22 = 22, -+ fs6 = 22, -+ f23 = 23, -+ fs7 = 23, -+ f24 = 24, -+ fs8 = 24, -+ f25 = 25, -+ fs9 = 25, -+ f26 = 26, -+ fs10 = 26, -+ f27 = 27, -+ fs11 = 27, -+ f28 = 28, -+ ft8 = 28, -+ f29 = 29, -+ ft9 = 29, -+ f30 = 30, -+ ft10 = 30, -+ f31 = 31, -+ ft11 = 31, -+ invalid_reg -+ }; -+ -+ typedef uint8_t Code; -+ typedef FPRegisterID Encoding; -+ typedef uint32_t SetType; -+ -+ enum Kind : uint8_t { Double, Single }; -+ -+ union RegisterContent { -+ float s; -+ double d; -+ }; -+ -+ static const char* GetName(uint32_t code) { -+ // clang-format off -+ static const char* const Names[] = { -+ "ft0", "ft1", "ft2", "ft3", "ft4", "ft5", "ft6", "ft7", -+ "fs0", "fs1", "fa0", "fa1", "fa2", "fa3", "fa4", "fa5", -+ "fa6", "fa7", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7", -+ "fs8", "fs9", "fs10", "fs11", "ft8", "ft9", "ft10", "ft11", -+ }; -+ // clang-format on -+ static_assert(Total == sizeof(Names) / sizeof(Names[0]), -+ "Table is the correct size"); -+ if (code >= Total) { -+ return "invalid"; -+ } -+ return Names[code]; -+ } -+ static Code FromName(const char* name) { -+ for (size_t i = 0; i < Total; i++) { -+ if (strcmp(GetName(i), name) == 0) { -+ return Code(i); -+ } -+ } -+ -+ return Invalid; -+ } -+ -+ static constexpr Encoding encoding(Code c) { return Encoding(c & 31); } -+ -+ static const Encoding Invalid = invalid_reg; -+ static const uint32_t Total = 32; -+ static const uint32_t TotalPhys = 32; -+ static const uint32_t Allocatable = 32; -+ static const SetType AllMask = 0xffffffff; -+ static const SetType AllDoubleMask = 0; -+ static const SetType AllSingleMask = 0; -+ static const SetType VolatileMask = -+ (1 << FloatRegisters::ft0) | (1 << FloatRegisters::ft1) | -+ (1 << FloatRegisters::ft2) | (1 << FloatRegisters::ft3) | -+ (1 << FloatRegisters::ft4) | (1 << FloatRegisters::ft5) | -+ (1 << FloatRegisters::ft6) | (1 << FloatRegisters::ft7) | -+ (1 << FloatRegisters::ft8) | (1 << FloatRegisters::ft9) | -+ (1 << FloatRegisters::ft10) | (1 << FloatRegisters::ft11) | -+ (1 << FloatRegisters::fa0) | (1 << FloatRegisters::fa1) | -+ (1 << FloatRegisters::fa2) | (1 << FloatRegisters::fa3) | -+ (1 << FloatRegisters::fa4) | (1 << FloatRegisters::fa5) | -+ (1 << FloatRegisters::fa6) | (1 << FloatRegisters::fa7); -+ static const SetType NonVolatileMask = -+ (1 << FloatRegisters::fs0) | (1 << FloatRegisters::fs1) | -+ (1 << FloatRegisters::fs2) | (1 << FloatRegisters::fs3) | -+ (1 << FloatRegisters::fs4) | (1 << FloatRegisters::fs5) | -+ (1 << FloatRegisters::fs6) | (1 << FloatRegisters::fs7) | -+ (1 << FloatRegisters::fs8) | (1 << FloatRegisters::fs9) | -+ (1 << FloatRegisters::fs10) | (1 << FloatRegisters::fs11); -+ static const SetType NonAllocatableMask = 0; -+ static const SetType AllocatableMask = AllMask & ~NonAllocatableMask; -+}; -+ -+template <typename T> -+class TypedRegisterSet; -+ -+struct FloatRegister { -+ typedef FloatRegisters Codes; -+ typedef size_t Code; -+ typedef Codes::Encoding Encoding; -+ typedef Codes::SetType SetType; -+ typedef Codes::Kind Kind; -+ -+ private: -+ uint8_t encoding_; -+ uint8_t kind_; -+ bool invalid_; -+ -+ public: -+ constexpr FloatRegister(Encoding encoding) -+ : encoding_(encoding), kind_(FloatRegisters::Double), invalid_(false) {} -+ constexpr FloatRegister(Encoding encoding, Kind kind) -+ : encoding_(encoding), kind_(kind), invalid_(false) {} -+ constexpr FloatRegister() -+ : encoding_(0), kind_(FloatRegisters::Double), invalid_(true) {} -+ -+ static uint32_t FirstBit(SetType) { MOZ_CRASH(); } -+ static uint32_t LastBit(SetType) { MOZ_CRASH(); } -+ static FloatRegister FromCode(uint32_t i) { -+ return FloatRegister(FloatRegisters::encoding(i), FloatRegisters::Double); -+ } -+ bool isSingle() const { return kind_ == FloatRegisters::Single; } -+ bool isDouble() const { return kind_ == FloatRegisters::Double; } -+ bool isSimd128() const { return false; } -+ bool isInvalid() const { return invalid_; } -+ FloatRegister asSingle() const { MOZ_CRASH(); } -+ FloatRegister asDouble() const { MOZ_CRASH(); } -+ FloatRegister asSimd128() const { MOZ_CRASH(); } -+ Code code() const { MOZ_CRASH(); } -+ Encoding encoding() const { return Encoding(encoding_); } -+ const char* name() const { return FloatRegisters::GetName(code()); } -+ bool volatile_() const { MOZ_CRASH(); } -+ bool operator!=(FloatRegister) const { MOZ_CRASH(); } -+ bool operator==(FloatRegister) const { MOZ_CRASH(); } -+ bool aliases(FloatRegister) const { MOZ_CRASH(); } -+ uint32_t numAliased() const { MOZ_CRASH(); } -+ FloatRegister aliased(uint32_t) { MOZ_CRASH(); } -+ bool equiv(FloatRegister) const { MOZ_CRASH(); } -+ uint32_t size() const { MOZ_CRASH(); } -+ uint32_t numAlignedAliased() const { MOZ_CRASH(); } -+ FloatRegister alignedAliased(uint32_t) { MOZ_CRASH(); } -+ SetType alignedOrDominatedAliasedSet() const { MOZ_CRASH(); } -+ -+ static constexpr RegTypeName DefaultType = RegTypeName::Float64; -+ -+ template <RegTypeName = DefaultType> -+ static SetType LiveAsIndexableSet(SetType s) { -+ return SetType(0); -+ } -+ -+ template <RegTypeName Name = DefaultType> -+ static SetType AllocatableAsIndexableSet(SetType s) { -+ static_assert(Name != RegTypeName::Any, "Allocatable set are not iterable"); -+ return SetType(0); -+ } -+ -+ template <typename T> -+ static T ReduceSetForPush(T) { -+ MOZ_CRASH(); -+ } -+ uint32_t getRegisterDumpOffsetInBytes() { -+ MOZ_CRASH(); -+ return 0; -+ } -+ static uint32_t SetSize(SetType x) { -+ MOZ_CRASH(); -+ return 0; -+ } -+ static Code FromName(const char* name) { return 0; } -+ -+ // This is used in static initializers, so produce a bogus value instead of -+ // crashing. -+ static uint32_t GetPushSizeInBytes(const TypedRegisterSet<FloatRegister>&) { -+ return 0; -+ } -+}; -+ -+inline bool hasUnaliasedDouble() { MOZ_CRASH(); } -+inline bool hasMultiAlias() { MOZ_CRASH(); } -+ -+static const uint32_t ShadowStackSpace = 0; -+static const uint32_t JumpImmediateRange = INT32_MAX; -+ -+} // namespace jit -+} // namespace js -+ -+#endif /* jit_riscv64_Architecture_riscv64_h */ -diff --git a/js/src/jit/riscv64/Assembler-riscv64.cpp b/js/src/jit/riscv64/Assembler-riscv64.cpp -new file mode 100644 -index 0000000000..90fa6d87a8 ---- /dev/null -+++ b/js/src/jit/riscv64/Assembler-riscv64.cpp -@@ -0,0 +1,47 @@ -+/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- -+ * vim: set ts=8 sts=2 et sw=2 tw=80: -+ * This Source Code Form is subject to the terms of the Mozilla Public -+ * License, v. 2.0. If a copy of the MPL was not distributed with this -+ * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ -+ -+#include "jit/riscv64/Assembler-riscv64.h" -+ -+using namespace js; -+using namespace js::jit; -+ -+ABIArg ABIArgGenerator::next(MIRType type) { -+ switch (type) { -+ case MIRType::Int32: -+ case MIRType::Int64: -+ case MIRType::Pointer: -+ case MIRType::RefOrNull: -+ case MIRType::StackResults: -+ if (intRegIndex_ == NumIntArgRegs) { -+ current_ = ABIArg(stackOffset_); -+ stackOffset_ += sizeof(uintptr_t); -+ break; -+ } -+ current_ = ABIArg(Register::FromCode(intRegIndex_)); -+ intRegIndex_++; -+ break; -+ -+ case MIRType::Float32: -+ case MIRType::Double: -+ if (floatRegIndex_ == NumFloatArgRegs) { -+ current_ = ABIArg(stackOffset_); -+ stackOffset_ += sizeof(double); -+ break; -+ } -+ current_ = ABIArg(FloatRegister(FloatRegisters::Encoding(floatRegIndex_), -+ type == MIRType::Double -+ ? FloatRegisters::Double -+ : FloatRegisters::Single)); -+ floatRegIndex_++; -+ break; -+ -+ case MIRType::Simd128: -+ default: -+ MOZ_CRASH("Unexpected argument type"); -+ } -+ return current_; -+} -diff --git a/js/src/jit/riscv64/Assembler-riscv64.h b/js/src/jit/riscv64/Assembler-riscv64.h -new file mode 100644 -index 0000000000..a58e6c4aff ---- /dev/null -+++ b/js/src/jit/riscv64/Assembler-riscv64.h -@@ -0,0 +1,303 @@ -+/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- -+ * vim: set ts=8 sts=2 et sw=2 tw=80: -+ * This Source Code Form is subject to the terms of the Mozilla Public -+ * License, v. 2.0. If a copy of the MPL was not distributed with this -+ * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ -+ -+#ifndef jit_riscv64_Assembler_riscv64_h -+#define jit_riscv64_Assembler_riscv64_h -+ -+#include "mozilla/Sprintf.h" -+#include <iterator> -+ -+#include "jit/CompactBuffer.h" -+#include "jit/JitCode.h" -+#include "jit/JitSpewer.h" -+#include "jit/riscv64/Architecture-riscv64.h" -+#include "jit/shared/Assembler-shared.h" -+#include "jit/shared/Disassembler-shared.h" -+#include "jit/shared/IonAssemblerBuffer.h" -+#include "wasm/WasmTypeDecls.h" -+ -+namespace js { -+namespace jit { -+ -+class MacroAssembler; -+ -+static constexpr Register t0{Registers::t0}; -+static constexpr Register t1{Registers::t1}; -+static constexpr Register t2{Registers::t2}; -+static constexpr Register t3{Registers::t3}; -+static constexpr Register t4{Registers::t4}; -+static constexpr Register t5{Registers::t5}; -+static constexpr Register t6{Registers::t6}; -+static constexpr Register s0{Registers::s0}; -+static constexpr Register s4{Registers::s4}; -+ -+static constexpr Register StackPointer{Registers::sp}; -+static constexpr Register FramePointer{Registers::fp}; -+static constexpr Register ReturnReg{Registers::a0}; -+static constexpr FloatRegister InvalidFloatReg; -+static constexpr FloatRegister ReturnFloat32Reg{FloatRegisters::fa0, -+ FloatRegisters::Single}; -+static constexpr FloatRegister ReturnDoubleReg{FloatRegisters::fa0, -+ FloatRegisters::Double}; -+static constexpr FloatRegister ReturnSimd128Reg = InvalidFloatReg; -+static constexpr FloatRegister ScratchSimd128Reg = InvalidFloatReg; -+static constexpr FloatRegister ScratchFloat32Reg_ = InvalidFloatReg; -+static constexpr FloatRegister ScratchDoubleReg_ = InvalidFloatReg; -+ -+static constexpr Register ScratchRegister = t6; -+ -+// Helper class for ScratchRegister usage. Asserts that only one piece -+// of code thinks it has exclusive ownership of the scratch register. -+struct ScratchRegisterScope : public AutoRegisterScope { -+ explicit ScratchRegisterScope(MacroAssembler& masm) -+ : AutoRegisterScope(masm, ScratchRegister) {} -+}; -+ -+struct SecondScratchRegisterScope : public AutoRegisterScope { -+ explicit SecondScratchRegisterScope(MacroAssembler& masm); -+}; -+ -+struct ScratchFloat32Scope : AutoFloatRegisterScope { -+ explicit ScratchFloat32Scope(MacroAssembler& masm) -+ : AutoFloatRegisterScope(masm, ScratchFloat32Reg_) {} -+}; -+ -+struct ScratchDoubleScope : AutoFloatRegisterScope { -+ explicit ScratchDoubleScope(MacroAssembler& masm) -+ : AutoFloatRegisterScope(masm, ScratchDoubleReg_) {} -+}; -+ -+static constexpr Register OsrFrameReg{Registers::invalid_reg}; -+static constexpr Register PreBarrierReg{Registers::invalid_reg}; -+static constexpr Register InterpreterPCReg{Registers::invalid_reg}; -+static constexpr Register CallTempReg0 = t0; -+static constexpr Register CallTempReg1 = t1; -+static constexpr Register CallTempReg2 = t2; -+static constexpr Register CallTempReg3 = t3; -+static constexpr Register CallTempReg4 = t4; -+static constexpr Register CallTempReg5 = t5; -+static constexpr Register InvalidReg{Registers::invalid_reg}; -+static constexpr Register CallTempNonArgRegs[] = {t0, t1, t2, t3, t4, t5, t6}; -+static const uint32_t NumCallTempNonArgRegs = std::size(CallTempNonArgRegs); -+ -+static constexpr Register IntArgReg0{Registers::a0}; -+static constexpr Register IntArgReg1{Registers::a1}; -+static constexpr Register IntArgReg2{Registers::a2}; -+static constexpr Register IntArgReg3{Registers::a3}; -+static constexpr Register IntArgReg4{Registers::a4}; -+static constexpr Register IntArgReg5{Registers::a5}; -+static constexpr Register IntArgReg6{Registers::a6}; -+static constexpr Register IntArgReg7{Registers::a7}; -+static constexpr Register HeapReg{Registers::invalid_reg}; -+ -+// Registerd used in RegExpTester instruction (do not use ReturnReg). -+static constexpr Register RegExpTesterRegExpReg = CallTempReg0; -+static constexpr Register RegExpTesterStringReg = CallTempReg1; -+static constexpr Register RegExpTesterLastIndexReg = CallTempReg2; -+ -+// Registerd used in RegExpMatcher instruction (do not use JSReturnOperand). -+static constexpr Register RegExpMatcherRegExpReg = CallTempReg0; -+static constexpr Register RegExpMatcherStringReg = CallTempReg1; -+static constexpr Register RegExpMatcherLastIndexReg = CallTempReg2; -+ -+static constexpr Register JSReturnReg_Type{Registers::a3}; -+static constexpr Register JSReturnReg_Data{Registers::a2}; -+static constexpr Register JSReturnReg{Registers::a2}; -+ -+static constexpr Register64 ReturnReg64(ReturnReg); -+ -+static constexpr Register ABINonArgReg0{Registers::s0}; -+static constexpr Register ABINonArgReg1{Registers::s1}; -+static constexpr Register ABINonArgReg2{Registers::s2}; -+static constexpr Register ABINonArgReg3{Registers::s3}; -+static constexpr Register ABINonArgReturnReg0{Registers::s0}; -+static constexpr Register ABINonArgReturnReg1{Registers::s1}; -+static constexpr Register ABINonVolatileReg{Registers::fp}; -+static constexpr Register ABINonArgReturnVolatileReg{Registers::ra}; -+ -+static constexpr FloatRegister ABINonArgDoubleReg = InvalidFloatReg; -+ -+// Instance pointer argument register for WebAssembly functions. This must not -+// alias any other register used for passing function arguments or return -+// values. Preserved by WebAssembly functions. -+static constexpr Register InstanceReg = s4; -+ -+static constexpr Register WasmTableCallScratchReg0{Registers::invalid_reg}; -+static constexpr Register WasmTableCallScratchReg1{Registers::invalid_reg}; -+static constexpr Register WasmTableCallSigReg{Registers::invalid_reg}; -+static constexpr Register WasmTableCallIndexReg{Registers::invalid_reg}; -+static constexpr Register WasmTlsReg{Registers::invalid_reg}; -+static constexpr Register WasmJitEntryReturnScratch{Registers::invalid_reg}; -+ -+static constexpr uint32_t ABIStackAlignment = 16; -+static constexpr uint32_t CodeAlignment = 16; -+static constexpr uint32_t JitStackAlignment = 8; -+static constexpr uint32_t JitStackValueAlignment = -+ JitStackAlignment / sizeof(Value); -+ -+static const Scale ScalePointer = TimesOne; -+ -+class Instruction; -+typedef js::jit::AssemblerBuffer<1024, Instruction> RISCVBuffer; -+ -+class Assembler : public AssemblerShared { -+ public: -+ enum RISCVCondition : uint32_t { -+ EQ = 0b000, -+ NE = 0b001, -+ LT = 0b100, -+ GE = 0b101, -+ LTU = 0b110, -+ GEU = 0b111, -+ }; -+ -+ enum Condition { -+ Equal, -+ NotEqual, -+ Above, -+ AboveOrEqual, -+ Below, -+ BelowOrEqual, -+ GreaterThan, -+ GreaterThanOrEqual, -+ LessThan, -+ LessThanOrEqual, -+ Overflow, -+ CarrySet, -+ CarryClear, -+ Signed, -+ NotSigned, -+ Zero, -+ NonZero, -+ Always, -+ }; -+ -+ enum DoubleCondition { -+ DoubleOrdered, -+ DoubleEqual, -+ DoubleNotEqual, -+ DoubleGreaterThan, -+ DoubleGreaterThanOrEqual, -+ DoubleLessThan, -+ DoubleLessThanOrEqual, -+ DoubleUnordered, -+ DoubleEqualOrUnordered, -+ DoubleNotEqualOrUnordered, -+ DoubleGreaterThanOrUnordered, -+ DoubleGreaterThanOrEqualOrUnordered, -+ DoubleLessThanOrUnordered, -+ DoubleLessThanOrEqualOrUnordered -+ }; -+ -+ RISCVBuffer m_buffer; -+ -+ BufferOffset nextOffset() { return m_buffer.nextOffset(); } -+ -+ static Condition InvertCondition(Condition) { MOZ_CRASH(); } -+ -+ static DoubleCondition InvertCondition(DoubleCondition) { MOZ_CRASH(); } -+ -+ static void TraceJumpRelocations(JSTracer* trc, JitCode* code, -+ CompactBufferReader& reader); -+ static void TraceDataRelocations(JSTracer* trc, JitCode* code, -+ CompactBufferReader& reader); -+ -+ template <typename T, typename S> -+ static void PatchDataWithValueCheck(CodeLocationLabel, T, S) { -+ MOZ_CRASH(); -+ } -+ static void PatchWrite_Imm32(CodeLocationLabel, Imm32) { MOZ_CRASH(); } -+ -+ static void PatchWrite_NearCall(CodeLocationLabel, CodeLocationLabel) { -+ MOZ_CRASH(); -+ } -+ static uint32_t PatchWrite_NearCallSize() { MOZ_CRASH(); } -+ -+ static void ToggleToJmp(CodeLocationLabel) { MOZ_CRASH(); } -+ static void ToggleToCmp(CodeLocationLabel) { MOZ_CRASH(); } -+ static void ToggleCall(CodeLocationLabel, bool) { MOZ_CRASH(); } -+ -+ static void Bind(uint8_t* rawCode, const CodeLabel& label) { MOZ_CRASH(); } -+ -+ static uintptr_t GetPointer(uint8_t*) { MOZ_CRASH(); } -+ -+ static bool HasRoundInstruction(RoundingMode) { return false; } -+ -+ void verifyHeapAccessDisassembly(uint32_t begin, uint32_t end, -+ const Disassembler::HeapAccess& heapAccess) { -+ MOZ_CRASH(); -+ } -+ -+ void setUnlimitedBuffer() { MOZ_CRASH(); } -+ -+ MOZ_ALWAYS_INLINE BufferOffset writeInst(uint32_t x) { -+ MOZ_ASSERT(hasCreator()); -+ return m_buffer.putInt(x); -+ } -+}; -+ -+class Instruction { -+ protected: -+ uint32_t data; -+ -+ // Standard constructor -+ Instruction(uint32_t data_) : data(data_) {} -+ -+ public: -+ uint32_t encode() const { return data; } -+ -+ void setData(uint32_t data) { this->data = data; } -+ Instruction* next(); -+ const uint32_t* raw() const { return &data; } -+ uint32_t size() const { return sizeof(data); } -+}; -+ -+class Operand { -+ public: -+ enum Kind { REG }; -+ -+ private: -+ Kind kind_ : 4; -+ uint32_t reg_ : 5; -+ int32_t offset_; -+ -+ public: -+ explicit Operand(const Register reg) -+ : kind_(REG), reg_(reg.code()), offset_(0) {} -+ explicit Operand(const FloatRegister) { MOZ_CRASH(); } -+ explicit Operand(const Address& adress) { MOZ_CRASH(); } -+ explicit Operand(Register reg, Imm32 offset) -+ : kind_(REG), reg_(reg.code()), offset_(offset.value) {} -+ explicit Operand(Register reg, int32_t offset) -+ : kind_(REG), reg_(reg.code()), offset_(offset) {} -+ -+ Kind kind() const { return kind_; } -+}; -+ -+static const uint32_t NumIntArgRegs = 8; -+static const uint32_t NumFloatArgRegs = 8; -+ -+class ABIArgGenerator { -+ public: -+ ABIArgGenerator() -+ : intRegIndex_(0), floatRegIndex_(0), stackOffset_(0), current_() {} -+ -+ ABIArg next(MIRType); -+ ABIArg& current() { return current_; } -+ uint32_t stackBytesConsumedSoFar() const { return stackOffset_; } -+ void increaseStackOffset(uint32_t bytes) { stackOffset_ += bytes; } -+ -+ private: -+ unsigned intRegIndex_; -+ unsigned floatRegIndex_; -+ uint32_t stackOffset_; -+ ABIArg current_; -+}; -+ -+} // namespace jit -+} // namespace js -+ -+#endif /* jit_riscv64_Assembler_riscv64_h */ -diff --git a/js/src/jit/riscv64/CodeGenerator-riscv64.h b/js/src/jit/riscv64/CodeGenerator-riscv64.h -new file mode 100644 -index 0000000000..db30b32283 ---- /dev/null -+++ b/js/src/jit/riscv64/CodeGenerator-riscv64.h -@@ -0,0 +1,78 @@ -+/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- -+ * vim: set ts=8 sts=2 et sw=2 tw=80: -+ * This Source Code Form is subject to the terms of the Mozilla Public -+ * License, v. 2.0. If a copy of the MPL was not distributed with this -+ * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ -+ -+#ifndef jit_riscv64_CodeGenerator_riscv64_h -+#define jit_riscv64_CodeGenerator_riscv64_h -+ -+#include "jit/shared/CodeGenerator-shared.h" -+ -+namespace js { -+namespace jit { -+ -+class CodeGeneratorRiscv64 : public CodeGeneratorShared { -+ protected: -+ CodeGeneratorRiscv64(MIRGenerator* gen, LIRGraph* graph, MacroAssembler* masm) -+ : CodeGeneratorShared(gen, graph, masm) { -+ MOZ_CRASH(); -+ } -+ -+ MoveOperand toMoveOperand(LAllocation) const { MOZ_CRASH(); } -+ template <typename T1, typename T2> -+ void bailoutCmp32(Assembler::Condition, T1, T2, LSnapshot*) { -+ MOZ_CRASH(); -+ } -+ template <typename T1, typename T2> -+ void bailoutTest32(Assembler::Condition, T1, T2, LSnapshot*) { -+ MOZ_CRASH(); -+ } -+ template <typename T1, typename T2> -+ void bailoutCmpPtr(Assembler::Condition, T1, T2, LSnapshot*) { -+ MOZ_CRASH(); -+ } -+ void bailoutTestPtr(Assembler::Condition, Register, Register, LSnapshot*) { -+ MOZ_CRASH(); -+ } -+ void bailoutIfFalseBool(Register, LSnapshot*) { MOZ_CRASH(); } -+ void bailoutFrom(Label*, LSnapshot*) { MOZ_CRASH(); } -+ void bailout(LSnapshot*) { MOZ_CRASH(); } -+ void bailoutIf(Assembler::Condition, LSnapshot*) { MOZ_CRASH(); } -+ bool generateOutOfLineCode() { MOZ_CRASH(); } -+ void testNullEmitBranch(Assembler::Condition, ValueOperand, MBasicBlock*, -+ MBasicBlock*) { -+ MOZ_CRASH(); -+ } -+ void testUndefinedEmitBranch(Assembler::Condition, ValueOperand, MBasicBlock*, -+ MBasicBlock*) { -+ MOZ_CRASH(); -+ } -+ void testObjectEmitBranch(Assembler::Condition, ValueOperand, MBasicBlock*, -+ MBasicBlock*) { -+ MOZ_CRASH(); -+ } -+ void testZeroEmitBranch(Assembler::Condition, Register, MBasicBlock*, -+ MBasicBlock*) { -+ MOZ_CRASH(); -+ } -+ void emitTableSwitchDispatch(MTableSwitch*, Register, Register) { -+ MOZ_CRASH(); -+ } -+ void emitBigIntDiv(LBigIntDiv*, Register, Register, Register, Label*) { -+ MOZ_CRASH(); -+ } -+ void emitBigIntMod(LBigIntMod*, Register, Register, Register, Label*) { -+ MOZ_CRASH(); -+ } -+ ValueOperand ToValue(LInstruction*, size_t) { MOZ_CRASH(); } -+ ValueOperand ToTempValue(LInstruction*, size_t) { MOZ_CRASH(); } -+ void generateInvalidateEpilogue() { MOZ_CRASH(); } -+}; -+ -+typedef CodeGeneratorRiscv64 CodeGeneratorSpecific; -+ -+} // namespace jit -+} // namespace js -+ -+#endif /* jit_riscv64_CodeGenerator_riscv64_h */ -diff --git a/js/src/jit/riscv64/LIR-riscv64.h b/js/src/jit/riscv64/LIR-riscv64.h -new file mode 100644 -index 0000000000..59d42c6c75 ---- /dev/null -+++ b/js/src/jit/riscv64/LIR-riscv64.h -@@ -0,0 +1,111 @@ -+/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- -+ * vim: set ts=8 sts=2 et sw=2 tw=80: -+ * This Source Code Form is subject to the terms of the Mozilla Public -+ * License, v. 2.0. If a copy of the MPL was not distributed with this -+ * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ -+ -+#ifndef jit_riscv64_LIR_riscv64_h -+#define jit_riscv64_LIR_riscv64_h -+ -+namespace js { -+namespace jit { -+ -+class LUnboxFloatingPoint : public LInstruction { -+ public: -+ LIR_HEADER(UnboxFloatingPoint) -+ static const size_t Input = 0; -+ -+ MUnbox* mir() const { MOZ_CRASH(); } -+ -+ const LDefinition* output() const { MOZ_CRASH(); } -+ MIRType type() const { MOZ_CRASH(); } -+}; -+ -+class LTableSwitch : public LInstruction { -+ public: -+ LIR_HEADER(TableSwitch) -+ MTableSwitch* mir() { MOZ_CRASH(); } -+ -+ const LAllocation* index() { MOZ_CRASH(); } -+ const LDefinition* tempInt() { MOZ_CRASH(); } -+ const LDefinition* tempPointer() { MOZ_CRASH(); } -+}; -+ -+class LTableSwitchV : public LInstruction { -+ public: -+ LIR_HEADER(TableSwitchV) -+ MTableSwitch* mir() { MOZ_CRASH(); } -+ -+ const LDefinition* tempInt() { MOZ_CRASH(); } -+ const LDefinition* tempFloat() { MOZ_CRASH(); } -+ const LDefinition* tempPointer() { MOZ_CRASH(); } -+ -+ static const size_t InputValue = 0; -+}; -+ -+class LWasmUint32ToFloat32 : public LInstructionHelper<1, 1, 0> { -+ public: -+ explicit LWasmUint32ToFloat32(const LAllocation&) -+ : LInstructionHelper(Opcode::Invalid) { -+ MOZ_CRASH(); -+ } -+}; -+ -+class LUnbox : public LInstructionHelper<1, 2, 0> { -+ public: -+ MUnbox* mir() const { MOZ_CRASH(); } -+ const LAllocation* payload() { MOZ_CRASH(); } -+ const LAllocation* type() { MOZ_CRASH(); } -+ const char* extraName() const { MOZ_CRASH(); } -+}; -+class LDivI : public LBinaryMath<1> { -+ public: -+ LDivI(const LAllocation&, const LAllocation&, const LDefinition&) -+ : LBinaryMath(Opcode::Invalid) { -+ MOZ_CRASH(); -+ } -+ MDiv* mir() const { MOZ_CRASH(); } -+}; -+class LDivPowTwoI : public LInstructionHelper<1, 1, 0> { -+ public: -+ LDivPowTwoI(const LAllocation&, int32_t) -+ : LInstructionHelper(Opcode::Invalid) { -+ MOZ_CRASH(); -+ } -+ const LAllocation* numerator() { MOZ_CRASH(); } -+ int32_t shift() { MOZ_CRASH(); } -+ MDiv* mir() const { MOZ_CRASH(); } -+}; -+class LModI : public LBinaryMath<1> { -+ public: -+ LModI(const LAllocation&, const LAllocation&, const LDefinition&) -+ : LBinaryMath(Opcode::Invalid) { -+ MOZ_CRASH(); -+ } -+ -+ const LDefinition* callTemp() { MOZ_CRASH(); } -+ MMod* mir() const { MOZ_CRASH(); } -+}; -+class LWasmUint32ToDouble : public LInstructionHelper<1, 1, 0> { -+ public: -+ explicit LWasmUint32ToDouble(const LAllocation&) -+ : LInstructionHelper(Opcode::Invalid) { -+ MOZ_CRASH(); -+ } -+}; -+class LModPowTwoI : public LInstructionHelper<1, 1, 0> { -+ public: -+ int32_t shift() { MOZ_CRASH(); } -+ LModPowTwoI(const LAllocation& lhs, int32_t shift) -+ : LInstructionHelper(Opcode::Invalid) { -+ MOZ_CRASH(); -+ } -+ MMod* mir() const { MOZ_CRASH(); } -+}; -+ -+class LMulI : public LInstruction {}; -+ -+} // namespace jit -+} // namespace js -+ -+#endif /* jit_riscv64_LIR_riscv64_h */ -diff --git a/js/src/jit/riscv64/Lowering-riscv64.h b/js/src/jit/riscv64/Lowering-riscv64.h -new file mode 100644 -index 0000000000..a68e52b872 ---- /dev/null -+++ b/js/src/jit/riscv64/Lowering-riscv64.h -@@ -0,0 +1,130 @@ -+/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- -+ * vim: set ts=8 sts=2 et sw=2 tw=80: -+ * This Source Code Form is subject to the terms of the Mozilla Public -+ * License, v. 2.0. If a copy of the MPL was not distributed with this -+ * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ -+ -+#ifndef jit_riscv64_Lowering_riscv64_h -+#define jit_riscv64_Lowering_riscv64_h -+ -+#include "jit/shared/Lowering-shared.h" -+ -+namespace js { -+namespace jit { -+ -+class LIRGeneratorRiscv64 : public LIRGeneratorShared { -+ protected: -+ LIRGeneratorRiscv64(MIRGenerator* gen, MIRGraph& graph, LIRGraph& lirGraph) -+ : LIRGeneratorShared(gen, graph, lirGraph) { -+ MOZ_CRASH(); -+ } -+ -+ LBoxAllocation useBoxFixed(MDefinition*, Register, Register, -+ bool useAtStart = false) { -+ MOZ_CRASH(); -+ } -+ -+ LAllocation useByteOpRegister(MDefinition*) { MOZ_CRASH(); } -+ LAllocation useByteOpRegisterAtStart(MDefinition*) { MOZ_CRASH(); } -+ LAllocation useByteOpRegisterOrNonDoubleConstant(MDefinition*) { -+ MOZ_CRASH(); -+ } -+ LDefinition tempByteOpRegister() { MOZ_CRASH(); } -+ LDefinition tempToUnbox() { MOZ_CRASH(); } -+ bool needTempForPostBarrier() { MOZ_CRASH(); } -+ void lowerUntypedPhiInput(MPhi*, uint32_t, LBlock*, size_t) { MOZ_CRASH(); } -+ void lowerInt64PhiInput(MPhi*, uint32_t, LBlock*, size_t) { MOZ_CRASH(); } -+ void defineInt64Phi(MPhi*, size_t) { MOZ_CRASH(); } -+ void lowerForShift(LInstructionHelper<1, 2, 0>*, MDefinition*, MDefinition*, -+ MDefinition*) { -+ MOZ_CRASH(); -+ } -+ void lowerUrshD(MUrsh*) { MOZ_CRASH(); } -+ void lowerPowOfTwoI(MPow*) { MOZ_CRASH(); } -+ template <typename T> -+ void lowerForALU(T, MDefinition*, MDefinition*, MDefinition* v = nullptr) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void lowerForFPU(T, MDefinition*, MDefinition*, MDefinition* v = nullptr) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void lowerForALUInt64(T, MDefinition*, MDefinition*, -+ MDefinition* v = nullptr) { -+ MOZ_CRASH(); -+ } -+ void lowerForMulInt64(LMulI64*, MMul*, MDefinition*, -+ MDefinition* v = nullptr) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void lowerForShiftInt64(T, MDefinition*, MDefinition*, -+ MDefinition* v = nullptr) { -+ MOZ_CRASH(); -+ } -+ void lowerForBitAndAndBranch(LBitAndAndBranch*, MInstruction*, MDefinition*, -+ MDefinition*) { -+ MOZ_CRASH(); -+ } -+ void lowerForCompareI64AndBranch(MTest*, MCompare*, JSOp, MDefinition*, -+ MDefinition*, MBasicBlock*, MBasicBlock*) { -+ MOZ_CRASH(); -+ } -+ -+ void lowerConstantDouble(double, MInstruction*) { MOZ_CRASH(); } -+ void lowerConstantFloat32(float, MInstruction*) { MOZ_CRASH(); } -+ void lowerTruncateDToInt32(MTruncateToInt32*) { MOZ_CRASH(); } -+ void lowerTruncateFToInt32(MTruncateToInt32*) { MOZ_CRASH(); } -+ void lowerBuiltinInt64ToFloatingPoint(MBuiltinInt64ToFloatingPoint* ins) { -+ MOZ_CRASH(); -+ } -+ void lowerWasmBuiltinTruncateToInt64(MWasmBuiltinTruncateToInt64* ins) { -+ MOZ_CRASH(); -+ } -+ void lowerWasmBuiltinTruncateToInt32(MWasmBuiltinTruncateToInt32* ins) { -+ MOZ_CRASH(); -+ } -+ void lowerDivI(MDiv*) { MOZ_CRASH(); } -+ void lowerModI(MMod*) { MOZ_CRASH(); } -+ void lowerDivI64(MDiv*) { MOZ_CRASH(); } -+ void lowerWasmBuiltinDivI64(MWasmBuiltinDivI64* div) { MOZ_CRASH(); } -+ void lowerModI64(MMod*) { MOZ_CRASH(); } -+ void lowerWasmBuiltinModI64(MWasmBuiltinModI64* mod) { MOZ_CRASH(); } -+ void lowerNegI(MInstruction*, MDefinition*) { MOZ_CRASH(); } -+ void lowerNegI64(MInstruction*, MDefinition*) { MOZ_CRASH(); } -+ void lowerMulI(MMul*, MDefinition*, MDefinition*) { MOZ_CRASH(); } -+ void lowerUDiv(MDiv*) { MOZ_CRASH(); } -+ void lowerUMod(MMod*) { MOZ_CRASH(); } -+ void lowerWasmSelectI(MWasmSelect* select) { MOZ_CRASH(); } -+ void lowerWasmSelectI64(MWasmSelect* select) { MOZ_CRASH(); } -+ void lowerWasmCompareAndSelect(MWasmSelect* ins, MDefinition* lhs, -+ MDefinition* rhs, MCompare::CompareType compTy, -+ JSOp jsop) { -+ MOZ_CRASH(); -+ } -+ bool canSpecializeWasmCompareAndSelect(MCompare::CompareType compTy, -+ MIRType insTy) { -+ MOZ_CRASH(); -+ } -+ -+ void lowerBigIntLsh(MBigIntLsh*) { MOZ_CRASH(); } -+ void lowerBigIntRsh(MBigIntRsh*) { MOZ_CRASH(); } -+ void lowerBigIntDiv(MBigIntDiv*) { MOZ_CRASH(); } -+ void lowerBigIntMod(MBigIntMod*) { MOZ_CRASH(); } -+ -+ void lowerAtomicLoad64(MLoadUnboxedScalar*) { MOZ_CRASH(); } -+ void lowerAtomicStore64(MStoreUnboxedScalar*) { MOZ_CRASH(); } -+ -+ LTableSwitch* newLTableSwitch(LAllocation, LDefinition, MTableSwitch*) { -+ MOZ_CRASH(); -+ } -+ LTableSwitchV* newLTableSwitchV(MTableSwitch*) { MOZ_CRASH(); } -+}; -+ -+typedef LIRGeneratorRiscv64 LIRGeneratorSpecific; -+ -+} // namespace jit -+} // namespace js -+ -+#endif /* jit_riscv64_Lowering_riscv64_h */ -diff --git a/js/src/jit/riscv64/MacroAssembler-riscv64-inl.h b/js/src/jit/riscv64/MacroAssembler-riscv64-inl.h -new file mode 100644 -index 0000000000..3dd6273d0f ---- /dev/null -+++ b/js/src/jit/riscv64/MacroAssembler-riscv64-inl.h -@@ -0,0 +1,18 @@ -+/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- -+ * vim: set ts=8 sts=2 et sw=2 tw=80: -+ * This Source Code Form is subject to the terms of the Mozilla Public -+ * License, v. 2.0. If a copy of the MPL was not distributed with this -+ * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ -+ -+#ifndef jit_riscv64_MacroAssembler_riscv64_inl_h -+#define jit_riscv64_MacroAssembler_riscv64_inl_h -+ -+#include "jit/riscv64/MacroAssembler-riscv64.h" -+ -+namespace js { -+namespace jit { -+ -+} // namespace jit -+} // namespace js -+ -+#endif -diff --git a/js/src/jit/riscv64/MacroAssembler-riscv64.h b/js/src/jit/riscv64/MacroAssembler-riscv64.h -new file mode 100644 -index 0000000000..30ca17d359 ---- /dev/null -+++ b/js/src/jit/riscv64/MacroAssembler-riscv64.h -@@ -0,0 +1,458 @@ -+/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- -+ * vim: set ts=8 sts=2 et sw=2 tw=80: -+ * This Source Code Form is subject to the terms of the Mozilla Public -+ * License, v. 2.0. If a copy of the MPL was not distributed with this -+ * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ -+ -+#ifndef jit_riscv64_MacroAssembler_riscv64_h -+#define jit_riscv64_MacroAssembler_riscv64_h -+ -+#include "jit/riscv64/Assembler-riscv64.h" -+#include "jit/MoveResolver.h" -+#include "wasm/WasmBuiltins.h" -+ -+namespace js { -+namespace jit { -+ -+static constexpr ValueOperand JSReturnOperand{JSReturnReg}; -+ -+class ScratchTagScope : public SecondScratchRegisterScope { -+ public: -+ ScratchTagScope(MacroAssembler& masm, const js::jit::ValueOperand&) -+ : SecondScratchRegisterScope(masm) {} -+}; -+ -+class ScratchTagScopeRelease { -+ ScratchTagScope* ts_; -+ -+ public: -+ explicit ScratchTagScopeRelease(ScratchTagScope* ts) : ts_(ts) { -+ ts_->release(); -+ } -+ -+ ~ScratchTagScopeRelease() { ts_->reacquire(); } -+}; -+ -+class MacroAssemblerRiscv64 : public Assembler { -+ protected: -+ // Perform a downcast. Should be removed by Bug 996602. -+ MacroAssembler& asMasm(); -+ const MacroAssembler& asMasm() const; -+ -+ public: -+ MacroAssemblerRiscv64() { MOZ_CRASH(); } -+ -+ MoveResolver moveResolver_; -+ -+ size_t size() const { MOZ_CRASH(); } -+ size_t bytesNeeded() const { MOZ_CRASH(); } -+ size_t jumpRelocationTableBytes() const { MOZ_CRASH(); } -+ size_t dataRelocationTableBytes() const { MOZ_CRASH(); } -+ size_t preBarrierTableBytes() const { MOZ_CRASH(); } -+ -+ size_t numCodeLabels() const { MOZ_CRASH(); } -+ CodeLabel codeLabel(size_t) { MOZ_CRASH(); } -+ -+ bool reserve(size_t size) { MOZ_CRASH(); } -+ bool appendRawCode(const uint8_t* code, size_t numBytes) { MOZ_CRASH(); } -+ bool swapBuffer(wasm::Bytes& bytes) { MOZ_CRASH(); } -+ -+ void assertNoGCThings() const { MOZ_CRASH(); } -+ -+ static bool SupportsFloatingPoint() { return false; } -+ static bool SupportsUnalignedAccesses() { return false; } -+ static bool SupportsFastUnalignedFPAccesses() { return false; } -+ -+ void executableCopy(void*, bool = true) { MOZ_CRASH(); } -+ void copyJumpRelocationTable(uint8_t*) { MOZ_CRASH(); } -+ void copyDataRelocationTable(uint8_t*) { MOZ_CRASH(); } -+ void copyPreBarrierTable(uint8_t*) { MOZ_CRASH(); } -+ void processCodeLabels(uint8_t*) { MOZ_CRASH(); } -+ -+ void flushBuffer() {} -+ -+ template <typename T> -+ void bind(T) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void j(Condition, T) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void jump(T) { -+ MOZ_CRASH(); -+ } -+ void writeCodePointer(CodeLabel* label) { -+ MOZ_CRASH(); -+ } -+ void haltingAlign(size_t) { MOZ_CRASH(); } -+ void nopAlign(size_t) { MOZ_CRASH(); } -+ void checkStackAlignment() { MOZ_CRASH(); } -+ uint32_t currentOffset() { return nextOffset().getOffset(); } -+ -+ void nop() { MOZ_CRASH(); } -+ void breakpoint() { MOZ_CRASH(); } -+ void abiret() { MOZ_CRASH(); } -+ void ret() { MOZ_CRASH(); } -+ -+ CodeOffset toggledJump(Label*) { MOZ_CRASH(); } -+ CodeOffset toggledCall(JitCode*, bool) { MOZ_CRASH(); } -+ static size_t ToggledCallSize(uint8_t*) { MOZ_CRASH(); } -+ -+ void finish() { MOZ_CRASH(); } -+ -+ template <typename T, typename S> -+ void moveValue(T, S) { -+ MOZ_CRASH(); -+ } -+ template <typename T, typename S, typename U> -+ void moveValue(T, S, U) { -+ MOZ_CRASH(); -+ } -+ template <typename T, typename S> -+ void storeValue(const T&, const S&) { -+ MOZ_CRASH(); -+ } -+ template <typename T, typename S, typename U> -+ void storeValue(T, S, U) { -+ MOZ_CRASH(); -+ } -+ template <typename T, typename S> -+ void storePrivateValue(const T&, const S&) { -+ MOZ_CRASH(); -+ } -+ template <typename T, typename S> -+ void loadValue(T, S) { -+ MOZ_CRASH(); -+ } -+ template <typename T, typename S> -+ void loadUnalignedValue(T, S) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void pushValue(const T&) { -+ MOZ_CRASH(); -+ } -+ template <typename T, typename S> -+ void pushValue(T, S) { -+ MOZ_CRASH(); -+ } -+ void popValue(ValueOperand) { MOZ_CRASH(); } -+ void tagValue(JSValueType, Register, ValueOperand) { MOZ_CRASH(); } -+ void retn(Imm32 n) { MOZ_CRASH(); } -+ template <typename T> -+ void push(const T&) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void Push(T) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void pop(T) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void Pop(T) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ CodeOffset pushWithPatch(T) { -+ MOZ_CRASH(); -+ } -+ -+ void testNullSet(Condition, ValueOperand, Register) { MOZ_CRASH(); } -+ void testObjectSet(Condition, ValueOperand, Register) { MOZ_CRASH(); } -+ void testUndefinedSet(Condition, ValueOperand, Register) { MOZ_CRASH(); } -+ -+ template <typename T, typename S> -+ void cmpPtrSet(Condition, T, S, Register) { -+ MOZ_CRASH(); -+ } -+ void cmp8Set(Condition, Address, Imm32, Register) { MOZ_CRASH(); } -+ void cmp16Set(Condition, Address, Imm32, Register) { MOZ_CRASH(); } -+ template <typename T, typename S> -+ void cmp32Set(Condition, T, S, Register) { -+ MOZ_CRASH(); -+ } -+ void cmp64Set(Condition, Address, Imm64, Register) { MOZ_CRASH(); } -+ -+ template <typename T> -+ void mov(T, Register) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void movePtr(T, Register) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void move32(const T&, Register) { -+ MOZ_CRASH(); -+ } -+ template <typename T, typename S> -+ void movq(T, S) { -+ MOZ_CRASH(); -+ } -+ template <typename T, typename S> -+ void moveFloat32(T, S) { -+ MOZ_CRASH(); -+ } -+ template <typename T, typename S> -+ void moveDouble(T, S) { -+ MOZ_CRASH(); -+ } -+ template <typename T, typename S> -+ void move64(T, S) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ CodeOffset movWithPatch(T, Register) { -+ MOZ_CRASH(); -+ } -+ -+ template <typename T> -+ void loadPtr(T, Register) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void load32(T, Register) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void load32Unaligned(T, Register) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void loadFloat32(T, FloatRegister) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void loadDouble(T, FloatRegister) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void loadPrivate(T, Register) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void load8SignExtend(T, Register) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void load8ZeroExtend(T, Register) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void load16SignExtend(T, Register) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void load16UnalignedSignExtend(T, Register) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void load16ZeroExtend(T, Register) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void load16UnalignedZeroExtend(T, Register) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void load64(T, Register64) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void load64Unaligned(T, Register64) { -+ MOZ_CRASH(); -+ } -+ -+ template <typename T, typename S> -+ void storePtr(const T&, S) { -+ MOZ_CRASH(); -+ } -+ template <typename T, typename S> -+ void store32(T, S) { -+ MOZ_CRASH(); -+ } -+ template <typename T, typename S> -+ void store32_NoSecondScratch(T, S) { -+ MOZ_CRASH(); -+ } -+ template <typename T, typename S> -+ void store32Unaligned(T, S) { -+ MOZ_CRASH(); -+ } -+ template <typename T, typename S> -+ void storeFloat32(T, S) { -+ MOZ_CRASH(); -+ } -+ template <typename T, typename S> -+ void storeDouble(T, S) { -+ MOZ_CRASH(); -+ } -+ template <typename T, typename S> -+ void store8(T, S) { -+ MOZ_CRASH(); -+ } -+ template <typename T, typename S> -+ void store16(T, S) { -+ MOZ_CRASH(); -+ } -+ template <typename T, typename S> -+ void store16Unaligned(T, S) { -+ MOZ_CRASH(); -+ } -+ template <typename T, typename S> -+ void store64(T, S) { -+ MOZ_CRASH(); -+ } -+ template <typename T, typename S> -+ void store64Unaligned(T, S) { -+ MOZ_CRASH(); -+ } -+ -+ template <typename T> -+ void computeEffectiveAddress(T, Register) { -+ MOZ_CRASH(); -+ } -+ -+ void splitTagForTest(ValueOperand, ScratchTagScope&) { MOZ_CRASH(); } -+ -+ void boxDouble(FloatRegister, ValueOperand, FloatRegister) { MOZ_CRASH(); } -+ void boxNonDouble(JSValueType, Register, ValueOperand) { MOZ_CRASH(); } -+ template <typename T> -+ void boxDouble(FloatRegister src, const T& dest) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void unboxInt32(T, Register) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void unboxBoolean(T, Register) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void unboxString(T, Register) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void unboxSymbol(T, Register) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void unboxBigInt(T, Register) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void unboxObject(T, Register) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void unboxDouble(T, FloatRegister) { -+ MOZ_CRASH(); -+ } -+ void unboxValue(const ValueOperand&, AnyRegister, JSValueType) { -+ MOZ_CRASH(); -+ } -+ void unboxNonDouble(const ValueOperand&, Register, JSValueType) { -+ MOZ_CRASH(); -+ } -+ void unboxNonDouble(const Address&, Register, JSValueType) { MOZ_CRASH(); } -+ template <typename T> -+ void unboxGCThingForGCBarrier(const T&, Register) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void unboxObjectOrNull(const T& src, Register dest) { -+ MOZ_CRASH(); -+ } -+ void notBoolean(ValueOperand) { MOZ_CRASH(); } -+ [[nodiscard]] Register extractObject(Address, Register) { MOZ_CRASH(); } -+ [[nodiscard]] Register extractObject(ValueOperand, Register) { MOZ_CRASH(); } -+ [[nodiscard]] Register extractSymbol(ValueOperand, Register) { MOZ_CRASH(); } -+ [[nodiscard]] Register extractInt32(ValueOperand, Register) { MOZ_CRASH(); } -+ [[nodiscard]] Register extractBoolean(ValueOperand, Register) { MOZ_CRASH(); } -+ template <typename T> -+ [[nodiscard]] Register extractTag(T, Register) { -+ MOZ_CRASH(); -+ } -+ -+ void convertFloat32ToInt32(FloatRegister, Register, Label*, bool v = true) { -+ MOZ_CRASH(); -+ } -+ void convertDoubleToInt32(FloatRegister, Register, Label*, bool v = true) { -+ MOZ_CRASH(); -+ } -+ void convertDoubleToPtr(FloatRegister, Register, Label*, bool v = true) { -+ MOZ_CRASH(); -+ } -+ void convertBoolToInt32(Register, Register) { MOZ_CRASH(); } -+ -+ void convertDoubleToFloat32(FloatRegister, FloatRegister) { MOZ_CRASH(); } -+ void convertInt32ToFloat32(Register, FloatRegister) { MOZ_CRASH(); } -+ -+ template <typename T> -+ void convertInt32ToDouble(T, FloatRegister) { -+ MOZ_CRASH(); -+ } -+ void convertFloat32ToDouble(FloatRegister, FloatRegister) { MOZ_CRASH(); } -+ -+ void boolValueToDouble(ValueOperand, FloatRegister) { MOZ_CRASH(); } -+ void boolValueToFloat32(ValueOperand, FloatRegister) { MOZ_CRASH(); } -+ void int32ValueToDouble(ValueOperand, FloatRegister) { MOZ_CRASH(); } -+ void int32ValueToFloat32(ValueOperand, FloatRegister) { MOZ_CRASH(); } -+ -+ void loadConstantDouble(double, FloatRegister) { MOZ_CRASH(); } -+ void loadConstantFloat32(float, FloatRegister) { MOZ_CRASH(); } -+ Condition testInt32Truthy(bool, ValueOperand) { MOZ_CRASH(); } -+ Condition testStringTruthy(bool, ValueOperand) { MOZ_CRASH(); } -+ Condition testBigIntTruthy(bool, ValueOperand) { MOZ_CRASH(); } -+ -+ template <typename T> -+ void loadUnboxedValue(T, MIRType, AnyRegister) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void storeUnboxedValue(const ConstantOrRegister&, MIRType, T, MIRType) { -+ MOZ_CRASH(); -+ } -+ template <typename T> -+ void storeUnboxedPayload(ValueOperand value, T, size_t, JSValueType) { -+ MOZ_CRASH(); -+ } -+ -+ void convertUInt32ToDouble(Register, FloatRegister) { MOZ_CRASH(); } -+ void convertUInt32ToFloat32(Register, FloatRegister) { MOZ_CRASH(); } -+ void incrementInt32Value(Address) { MOZ_CRASH(); } -+ void ensureDouble(ValueOperand, FloatRegister, Label*) { MOZ_CRASH(); } -+ -+ void buildFakeExitFrame(Register, uint32_t*) { MOZ_CRASH(); } -+ bool buildOOLFakeExitFrame(void*) { MOZ_CRASH(); } -+ -+ void setPrinter(Sprinter*) { MOZ_CRASH(); } -+ Operand ToPayload(Operand base) { MOZ_CRASH(); } -+ Address ToPayload(Address) { MOZ_CRASH(); } -+ -+ Register getStackPointer() const { MOZ_CRASH(); } -+ -+ void handleFailureWithHandlerTail(Label* profilerExitTail, -+ Label* bailoutTail) { MOZ_CRASH(); } -+ -+ // Instrumentation for entering and leaving the profiler. -+ void profilerEnterFrame(Register, Register) { MOZ_CRASH(); } -+ void profilerExitFrame() { MOZ_CRASH(); } -+}; -+ -+typedef MacroAssemblerRiscv64 MacroAssemblerSpecific; -+ -+static inline bool GetTempRegForIntArg(uint32_t, uint32_t, Register*) { -+ MOZ_CRASH(); -+} -+ -+} // namespace jit -+} // namespace js -+ -+#endif /* jit_riscv64_MacroAssembler_riscv64_h */ -diff --git a/js/src/jit/riscv64/MoveEmitter-riscv64.h b/js/src/jit/riscv64/MoveEmitter-riscv64.h -new file mode 100644 -index 0000000000..24ca3aebb2 ---- /dev/null -+++ b/js/src/jit/riscv64/MoveEmitter-riscv64.h -@@ -0,0 +1,32 @@ -+/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- -+ * vim: set ts=8 sts=2 et sw=2 tw=80: -+ * This Source Code Form is subject to the terms of the Mozilla Public -+ * License, v. 2.0. If a copy of the MPL was not distributed with this -+ * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ -+ -+#ifndef jit_riscv64_MoveEmitter_riscv64_h -+#define jit_riscv64_MoveEmitter_riscv64_h -+ -+#include "mozilla/Assertions.h" -+ -+namespace js { -+namespace jit { -+ -+class MacroAssemblerRiscv64; -+class MoveResolver; -+struct Register; -+ -+class MoveEmitterRiscv64 { -+ public: -+ explicit MoveEmitterRiscv64(MacroAssemblerRiscv64&) { MOZ_CRASH(); } -+ void emit(const MoveResolver&) { MOZ_CRASH(); } -+ void finish() { MOZ_CRASH(); } -+ void setScratchRegister(Register) { MOZ_CRASH(); } -+}; -+ -+typedef MoveEmitterRiscv64 MoveEmitter; -+ -+} // namespace jit -+} // namespace js -+ -+#endif /* jit_riscv64_MoveEmitter_riscv64_h */ -diff --git a/js/src/jit/riscv64/SharedICHelpers-riscv64-inl.h b/js/src/jit/riscv64/SharedICHelpers-riscv64-inl.h -new file mode 100644 -index 0000000000..7c6f7b7c20 ---- /dev/null -+++ b/js/src/jit/riscv64/SharedICHelpers-riscv64-inl.h -@@ -0,0 +1,34 @@ -+/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- -+ * vim: set ts=8 sts=2 et sw=2 tw=80: -+ * This Source Code Form is subject to the terms of the Mozilla Public -+ * License, v. 2.0. If a copy of the MPL was not distributed with this -+ * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ -+ -+#ifndef jit_riscv64_SharedICHelpers_riscv64_inl_h -+#define jit_riscv64_SharedICHelpers_riscv64_inl_h -+ -+#include "jit/SharedICHelpers.h" -+ -+namespace js { -+namespace jit { -+ -+inline void EmitBaselineTailCallVM(TrampolinePtr, MacroAssembler&, uint32_t) { -+ MOZ_CRASH(); -+} -+inline void EmitBaselineCreateStubFrameDescriptor(MacroAssembler&, Register, -+ uint32_t) { -+ MOZ_CRASH(); -+} -+inline void EmitBaselineCallVM(TrampolinePtr, MacroAssembler&) { MOZ_CRASH(); } -+ -+static const uint32_t STUB_FRAME_SIZE = 0; -+static const uint32_t STUB_FRAME_SAVED_STUB_OFFSET = 0; -+ -+inline void EmitBaselineEnterStubFrame(MacroAssembler&, Register) { -+ MOZ_CRASH(); -+} -+ -+} // namespace jit -+} // namespace js -+ -+#endif /* jit_riscv64_SharedICHelpers_riscv64_inl_h */ -diff --git a/js/src/jit/riscv64/SharedICHelpers-riscv64.h b/js/src/jit/riscv64/SharedICHelpers-riscv64.h -new file mode 100644 -index 0000000000..205b6615da ---- /dev/null -+++ b/js/src/jit/riscv64/SharedICHelpers-riscv64.h -@@ -0,0 +1,35 @@ -+/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- -+ * vim: set ts=8 sts=2 et sw=2 tw=80: -+ * This Source Code Form is subject to the terms of the Mozilla Public -+ * License, v. 2.0. If a copy of the MPL was not distributed with this -+ * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ -+ -+#ifndef jit_riscv64_SharedICHelpers_riscv64_h -+#define jit_riscv64_SharedICHelpers_riscv64_h -+ -+#include "jit/MacroAssembler.h" -+#include "jit/SharedICRegisters.h" -+ -+namespace js { -+namespace jit { -+ -+static const size_t ICStackValueOffset = 0; -+ -+inline void EmitRestoreTailCallReg(MacroAssembler&) { MOZ_CRASH(); } -+inline void EmitRepushTailCallReg(MacroAssembler&) { MOZ_CRASH(); } -+inline void EmitCallIC(MacroAssembler&, CodeOffset*) { MOZ_CRASH(); } -+inline void EmitReturnFromIC(MacroAssembler&) { MOZ_CRASH(); } -+inline void EmitBaselineLeaveStubFrame(MacroAssembler&, bool v = false) { -+ MOZ_CRASH(); -+} -+inline void EmitStubGuardFailure(MacroAssembler&) { MOZ_CRASH(); } -+ -+template <typename T> -+inline void EmitPreBarrier(MacroAssembler&, T, MIRType) { -+ MOZ_CRASH(); -+} -+ -+} // namespace jit -+} // namespace js -+ -+#endif /* jit_riscv64_SharedICHelpers_riscv64_h */ -diff --git a/js/src/jit/riscv64/SharedICRegisters-riscv64.h b/js/src/jit/riscv64/SharedICRegisters-riscv64.h -new file mode 100644 -index 0000000000..f1d5f165d8 ---- /dev/null -+++ b/js/src/jit/riscv64/SharedICRegisters-riscv64.h -@@ -0,0 +1,38 @@ -+/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- -+ * vim: set ts=8 sts=2 et sw=2 tw=80: -+ * This Source Code Form is subject to the terms of the Mozilla Public -+ * License, v. 2.0. If a copy of the MPL was not distributed with this -+ * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ -+ -+#ifndef jit_riscv64_SharedICRegisters_riscv64_h -+#define jit_riscv64_SharedICRegisters_riscv64_h -+ -+#include "jit/riscv64/Assembler-riscv64.h" -+#include "jit/Registers.h" -+#include "jit/RegisterSets.h" -+ -+namespace js { -+namespace jit { -+ -+static constexpr Register BaselineFrameReg{Registers::invalid_reg}; -+static constexpr Register BaselineStackReg{Registers::invalid_reg}; -+ -+static constexpr ValueOperand R0 = JSReturnOperand; -+static constexpr ValueOperand R1 = JSReturnOperand; -+static constexpr ValueOperand R2 = JSReturnOperand; -+ -+static constexpr Register ICTailCallReg{Registers::invalid_reg}; -+static constexpr Register ICStubReg{Registers::invalid_reg}; -+ -+static constexpr Register ExtractTemp0{Registers::invalid_reg}; -+static constexpr Register ExtractTemp1{Registers::invalid_reg}; -+ -+static constexpr FloatRegister FloatReg0; -+static constexpr FloatRegister FloatReg1; -+static constexpr FloatRegister FloatReg2; -+static constexpr FloatRegister FloatReg3; -+ -+} // namespace jit -+} // namespace js -+ -+#endif /* jit_riscv64_SharedICRegisters_riscv64_h */ -diff --git a/js/src/jit/riscv64/Trampoline-riscv64.cpp b/js/src/jit/riscv64/Trampoline-riscv64.cpp -new file mode 100644 -index 0000000000..0774254cf4 ---- /dev/null -+++ b/js/src/jit/riscv64/Trampoline-riscv64.cpp -@@ -0,0 +1,67 @@ -+/* -*- Mode: C++; tab-width: 8; indent-tabs-mode: nil; c-basic-offset: 2 -*- -+ * vim: set ts=8 sts=2 et sw=2 tw=80: -+ * This Source Code Form is subject to the terms of the Mozilla Public -+ * License, v. 2.0. If a copy of the MPL was not distributed with this -+ * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ -+ -+#include "jit/Bailouts.h" -+#include "jit/BaselineIC.h" -+#include "jit/JitRuntime.h" -+#include "vm/Realm.h" -+ -+using namespace js; -+using namespace js::jit; -+ -+// This file includes stubs for generating the JIT trampolines when there is no -+// JIT backend, and also includes implementations for assorted random things -+// which can't be implemented in headers. -+ -+void JitRuntime::generateEnterJIT(JSContext*, MacroAssembler&) { MOZ_CRASH(); } -+// static -+mozilla::Maybe<::JS::ProfilingFrameIterator::RegisterState> -+JitRuntime::getCppEntryRegisters(JitFrameLayout* frameStackAddress) { -+ return mozilla::Nothing{}; -+} -+void JitRuntime::generateInvalidator(MacroAssembler&, Label*) { MOZ_CRASH(); } -+void JitRuntime::generateArgumentsRectifier(MacroAssembler&, -+ ArgumentsRectifierKind kind) { -+ MOZ_CRASH(); -+} -+JitRuntime::BailoutTable JitRuntime::generateBailoutTable(MacroAssembler&, -+ Label*, uint32_t) { -+ MOZ_CRASH(); -+} -+void JitRuntime::generateBailoutHandler(MacroAssembler&, Label*) { -+ MOZ_CRASH(); -+} -+uint32_t JitRuntime::generatePreBarrier(JSContext*, MacroAssembler&, MIRType) { -+ MOZ_CRASH(); -+} -+void JitRuntime::generateExceptionTailStub(MacroAssembler&, Label*) { -+ MOZ_CRASH(); -+} -+void JitRuntime::generateBailoutTailStub(MacroAssembler&, Label*) { -+ MOZ_CRASH(); -+} -+void JitRuntime::generateProfilerExitFrameTailStub(MacroAssembler&, Label*) { -+ MOZ_CRASH(); -+} -+ -+bool JitRuntime::generateVMWrapper(JSContext*, MacroAssembler&, -+ const VMFunctionData&, DynFn, uint32_t*) { -+ MOZ_CRASH(); -+} -+ -+FrameSizeClass FrameSizeClass::FromDepth(uint32_t) { MOZ_CRASH(); } -+FrameSizeClass FrameSizeClass::ClassLimit() { MOZ_CRASH(); } -+uint32_t FrameSizeClass::frameSize() const { MOZ_CRASH(); } -+ -+BailoutFrameInfo::BailoutFrameInfo(const JitActivationIterator& iter, -+ BailoutStack* bailout) { -+ MOZ_CRASH(); -+} -+ -+BailoutFrameInfo::BailoutFrameInfo(const JitActivationIterator& iter, -+ InvalidationBailoutStack* bailout) { -+ MOZ_CRASH(); -+} -diff --git a/js/src/jit/shared/Assembler-shared.h b/js/src/jit/shared/Assembler-shared.h -index fcabddd98b..19cf397df1 100644 ---- a/js/src/jit/shared/Assembler-shared.h -+++ b/js/src/jit/shared/Assembler-shared.h -@@ -26,13 +26,14 @@ - - #if defined(JS_CODEGEN_ARM) || defined(JS_CODEGEN_ARM64) || \ - defined(JS_CODEGEN_MIPS32) || defined(JS_CODEGEN_MIPS64) || \ -- defined(JS_CODEGEN_LOONG64) -+ defined(JS_CODEGEN_LOONG64) || defined(JS_CODEGEN_RISCV64) - // Push return addresses callee-side. - # define JS_USE_LINK_REGISTER - #endif - - #if defined(JS_CODEGEN_MIPS32) || defined(JS_CODEGEN_MIPS64) || \ -- defined(JS_CODEGEN_ARM64) || defined(JS_CODEGEN_LOONG64) -+ defined(JS_CODEGEN_ARM64) || defined(JS_CODEGEN_LOONG64) || \ -+ defined(JS_CODEGEN_RISCV64) - // JS_CODELABEL_LINKMODE gives labels additional metadata - // describing how Bind() should patch them. - # define JS_CODELABEL_LINKMODE -diff --git a/js/src/util/Poison.h b/js/src/util/Poison.h -index cb8e1abc64..a6a2d2f12b 100644 ---- a/js/src/util/Poison.h -+++ b/js/src/util/Poison.h -@@ -95,6 +95,8 @@ const uint8_t JS_SCOPE_DATA_TRAILING_NAMES_PATTERN = 0xCC; - # define JS_SWEPT_CODE_PATTERN 0x01 // undefined instruction - #elif defined(JS_CODEGEN_LOONG64) - # define JS_SWEPT_CODE_PATTERN 0x01 // undefined instruction -+#elif defined(JS_CODEGEN_RISCV64) -+# define JS_SWEPT_CODE_PATTERN 0x01 // undefined instruction - #else - # error "JS_SWEPT_CODE_PATTERN not defined for this platform" - #endif -diff --git a/js/src/wasm/WasmBCMemory.cpp b/js/src/wasm/WasmBCMemory.cpp -index 94e739090b..2c226dadd5 100644 ---- a/js/src/wasm/WasmBCMemory.cpp -+++ b/js/src/wasm/WasmBCMemory.cpp -@@ -1214,6 +1214,22 @@ static void Deallocate(BaseCompiler* bc, RegI32 rv, const Temps& temps) { - bc->maybeFree(temps.t2); - } - -+#elif defined(JS_CODEGEN_RISCV64) -+ -+struct Temps { -+ RegI32 t0; -+}; -+ -+static void PopAndAllocate(BaseCompiler* bc, ValType type, -+ Scalar::Type viewType, AtomicOp op, RegI32* rd, -+ RegI32* rv, Temps* temps) {} -+ -+static void Perform(BaseCompiler* bc, const MemoryAccessDesc& access, -+ BaseIndex srcAddr, AtomicOp op, RegI32 rv, RegI32 rd, -+ const Temps& temps) {} -+ -+static void Deallocate(BaseCompiler*, RegI32, const Temps&) {} -+ - #elif defined(JS_CODEGEN_NONE) - - using Temps = Nothing; -@@ -1375,6 +1391,17 @@ static void Deallocate(BaseCompiler* bc, AtomicOp op, RegI64 rv, RegI64 temp) { - bc->freeI64(temp); - } - -+#elif defined(JS_CODEGEN_RISCV64) -+ -+static void PopAndAllocate(BaseCompiler* bc, AtomicOp op, RegI64* rd, -+ RegI64* rv, RegI64* temp) {} -+ -+static void Perform(BaseCompiler* bc, const MemoryAccessDesc& access, -+ BaseIndex srcAddr, AtomicOp op, RegI64 rv, RegI64 temp, -+ RegI64 rd) {} -+ -+static void Deallocate(BaseCompiler* bc, AtomicOp op, RegI64 rv, RegI64 temp) {} -+ - #elif defined(JS_CODEGEN_NONE) - - static void PopAndAllocate(BaseCompiler*, AtomicOp, RegI64*, RegI64*, RegI64*) { -diff --git a/js/src/wasm/WasmCompile.cpp b/js/src/wasm/WasmCompile.cpp -index 26534bca4e..403e26414b 100644 ---- a/js/src/wasm/WasmCompile.cpp -+++ b/js/src/wasm/WasmCompile.cpp -@@ -74,6 +74,8 @@ uint32_t wasm::ObservedCPUFeatures() { - #elif defined(JS_CODEGEN_LOONG64) - MOZ_ASSERT(jit::GetLOONG64Flags() <= (UINT32_MAX >> ARCH_BITS)); - return LOONG64 | (jit::GetLOONG64Flags() << ARCH_BITS); -+#elif defined(JS_CODEGEN_RISCV64) -+ return 0; - #elif defined(JS_CODEGEN_NONE) - return 0; - #else -diff --git a/js/src/wasm/WasmFrameIter.cpp b/js/src/wasm/WasmFrameIter.cpp -index e612e05704..0ce3453287 100644 ---- a/js/src/wasm/WasmFrameIter.cpp -+++ b/js/src/wasm/WasmFrameIter.cpp -@@ -384,6 +384,12 @@ static const unsigned PushedFP = 16; - static const unsigned SetFP = 20; - static const unsigned PoppedFP = 4; - static const unsigned PoppedFPJitEntry = 0; -+#elif defined(JS_CODEGEN_RISCV64) -+static const unsigned PushedRetAddr = 0; -+static const unsigned PushedFP = 1; -+static const unsigned SetFP = 2; -+static const unsigned PoppedFP = 3; -+static const unsigned PoppedFPJitEntry = 4; - #elif defined(JS_CODEGEN_NONE) - // Synthetic values to satisfy asserts and avoid compiler warnings. - static const unsigned PushedRetAddr = 0; -diff --git a/js/src/wasm/WasmSignalHandlers.cpp b/js/src/wasm/WasmSignalHandlers.cpp -index f74368b954..9521441f02 100644 ---- a/js/src/wasm/WasmSignalHandlers.cpp -+++ b/js/src/wasm/WasmSignalHandlers.cpp -@@ -157,6 +157,11 @@ using mozilla::DebugOnly; - # define R01_sig(p) ((p)->uc_mcontext.gp_regs[1]) - # define R32_sig(p) ((p)->uc_mcontext.gp_regs[32]) - # endif -+# if defined(__linux__) && defined(__riscv) && __riscv_xlen == 64 -+# define EPC_sig(p) ((p)->uc_mcontext.__gregs[0]) -+# define X02_sig(p) ((p)->uc_mcontext.__gregs[2]) -+# define X08_sig(p) ((p)->uc_mcontext.__gregs[8]) -+# endif - # if defined(__linux__) && defined(__loongarch__) - # define EPC_sig(p) ((p)->uc_mcontext.pc) - # define RRA_sig(p) ((p)->uc_mcontext.gregs[1]) -@@ -405,6 +410,10 @@ struct macos_aarch64_context { - # define FP_sig(p) RFP_sig(p) - # define SP_sig(p) RSP_sig(p) - # define LR_sig(p) RRA_sig(p) -+# elif defined(__riscv) && __riscv_xlen == 64 -+# define PC_sig(p) EPC_sig(p) -+# define SP_sig(p) X02_sig(p) -+# define FP_sig(p) X08_sig(p) - # endif - - static void SetContextPC(CONTEXT* context, uint8_t* pc) { -diff --git a/python/mozbuild/mozbuild/vendor/vendor_rust.py b/python/mozbuild/mozbuild/vendor/vendor_rust.py -index 31baea4290..7394ccaf40 100644 ---- a/python/mozbuild/mozbuild/vendor/vendor_rust.py -+++ b/python/mozbuild/mozbuild/vendor/vendor_rust.py -@@ -98,6 +98,7 @@ TOLERATED_DUPES = { - "libloading": 2, - "memoffset": 2, - "mio": 2, -+ "nix": 2, - # Transition from time 0.1 to 0.3 underway, but chrono is stuck on 0.1 - # and hasn't been updated in 1.5 years (an hypothetical update is - # expected to remove the dependency on time altogether). -diff --git a/supply-chain/config.toml b/supply-chain/config.toml -index bb3dd733e8..371cbca809 100644 ---- a/supply-chain/config.toml -+++ b/supply-chain/config.toml -@@ -1,6 +1,10 @@ - - # cargo-vet config file - -+[policy.viaduct] -+audit-as-crates-io = true -+notes = "I don't know, do as what rust-vet tells me to do" -+ - [policy.async-task] - audit-as-crates-io = true - notes = "This is the upstream code plus an extra fix that hasn't been released yet, see bug 1746533." -diff --git a/toolkit/library/rust/shared/Cargo.toml b/toolkit/library/rust/shared/Cargo.toml -index dbd7770326..ffbadcb14c 100644 ---- a/toolkit/library/rust/shared/Cargo.toml -+++ b/toolkit/library/rust/shared/Cargo.toml -@@ -38,7 +38,7 @@ tokio-reactor = { version = "=0.1.3", optional = true } - # audioipc2-client and audioipc2-server. - tokio-threadpool = { version = "=0.1.17", optional = true } - encoding_glue = { path = "../../../../intl/encoding_glue" } --authenticator = "0.3.1" -+authenticator = { git = "https://github.com/mozilla/authenticator-rs", rev = "b85bccf0527e42c877573029e8d35ff13ef06f9d" } - gkrust_utils = { path = "../../../../xpcom/rust/gkrust_utils" } - gecko_logger = { path = "../../../../xpcom/rust/gecko_logger" } - rsdparsa_capi = { path = "../../../../dom/media/webrtc/sdp/rsdparsa_capi" } -@@ -72,6 +72,7 @@ midir_impl = { path = "../../../../dom/midi/midir_impl", optional = true } - dom = { path = "../../../../dom/base/rust" } - origin-trials-ffi = { path = "../../../../dom/origin-trials/ffi" } - jog = { path = "../../../components/glean/bindings/jog" } -+midir = { version = "0.8.0" } - - # Note: `modern_sqlite` means rusqlite's bindings file be for a sqlite with - # version less than or equal to what we link to. This isn't a problem because we |