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* [gas][aarch64][SVE2] Fix pmull{t,b} requirement on SVE2-AESMatthew Malcomson2019-07-011-8/+5
* [binutils][aarch64] New sve_size_tsz_bhs iclass.Matthew Malcomson2019-05-091-0/+11
* [binutils][aarch64] New sve_shift_tsz_bhsd iclass.Matthew Malcomson2019-05-091-0/+11
* [binutils][aarch64] New SVE_SHRIMM_UNPRED_22 operand.Matthew Malcomson2019-05-091-0/+11
* [binutils][aarch64] New sve_size_013 iclass.Matthew Malcomson2019-05-091-0/+10
* [binutils][aarch64] New sve_size_bh iclass.Matthew Malcomson2019-05-091-0/+1
* [binutils][aarch64] New sve_size_sd2 iclass.Matthew Malcomson2019-05-091-0/+4
* [binutils][aarch64] New iclass sve_size_hsd2.Matthew Malcomson2019-05-091-0/+7
* AArch64: Have -D override mapping symbol as documented.Tamar Christina2019-03-251-1/+2
* AArch64: Fix AArch64 disassembler mapping symbol searchTamar Christina2019-03-251-6/+38
* AArch64: Fix disassembler bug with out-of-order sectionsTamar Christina2019-03-251-1/+6
* AArch64: Remove ldgv and stgv instructions from Armv8.5-A Memory Tagging Exte...Sudi Das2019-01-251-17/+0
* Update year range in copyright notice of binutils filesAlan Modra2019-01-011-1/+1
* [BINUTILS, AARCH64, 6/8] Add Tag getting instruction in Memory Tagging ExtensionSudakshina Das2018-11-121-0/+17
* [BINUTILS, AARCH64, 4/8] Add Tag setting instructions in Memory Tagging Exten...Sudakshina Das2018-11-121-1/+2
* [BINUTILS, AARCH64, 2/8] Add Tag generation instructions in Memory Tagging Ex...Sudakshina Das2018-11-121-0/+2
* [PATCH, BINUTILS, AARCH64, 7/9] Add BTI instructionSudakshina Das2018-10-091-1/+1
* [PATCH, BINUTILS, AARCH64, 4/9] Add Execution and Data Restriction instructionsSudakshina Das2018-10-091-0/+6
* AArch64: Constraint disassembler and assembler changes.Tamar Christina2018-10-031-7/+59
* AArch64: Refactor verifiers to make more general.Tamar Christina2018-10-031-1/+2
* AArch64: Refactor err_type.Tamar Christina2018-10-031-13/+8
* AArch64: Wire through instr_sequenceTamar Christina2018-10-031-0/+3
* Fix AArch64 encodings for by element instructions.Tamar Christina2018-06-291-5/+14
* Implement Read/Write constraints on system registers on AArch64Tamar Christina2018-05-151-1/+16
* Allow non-fatal errors to be emitted and for disassembly notes be placed on A...Tamar Christina2018-05-151-2/+25
* Modify AArch64 Assembly and disassembly functions to be able to fail and repo...Tamar Christina2018-05-151-233/+299
* Fix unintialized memory in aarch64 opcodes.Tamar Christina2018-05-011-3/+3
* opcodes error messagesAlan Modra2018-03-031-1/+1
* Update year range in copyright notice of binutils filesAlan Modra2018-01-031-1/+1
* Correct disassembly of dot product instructions.Tamar Christina2017-12-191-1/+1
* [Binutils][Objdump]Check symbol section information while search a mapping sy...Renlin Li2017-12-111-3/+5
* Adds the new Fields and Operand types for the new instructions in Armv8.4-a.Tamar Christina2017-11-091-0/+27
* [AArch64] Add dot product support for AArch64 to binutilsTamar Christina2017-06-281-0/+15
* Prevent address violation problem when disassembling corrupt aarch64 binary.Nick Clifton2017-06-151-0/+3
* Don't use print_insn_XXX in GDBYao Qi2017-06-141-1/+1
* Don't compare boolean values against TRUE or FALSEAlan Modra2017-05-181-4/+4
* [AArch64] Additional SVE instructionsRichard Sandiford2017-02-241-31/+48
* Update year range in copyright notice of all files.Alan Modra2017-01-021-1/+1
* [AArch64] Add ARMv8.3 FCMLA and FCADD instructionsSzabolcs Nagy2016-11-181-0/+42
* [AArch64] Add ARMv8.3 combined pointer authentication load instructionsSzabolcs Nagy2016-11-181-0/+21
* AArch64/opcodes: Correct an `index' global shadowing errorMaciej W. Rozycki2016-10-181-4/+4
* -Wimplicit-fallthrough warning fixesAlan Modra2016-10-061-0/+5
* [AArch64] Add SVE condition codesRichard Sandiford2016-09-211-9/+40
* [AArch64][SVE 31/32] Add SVE instructionsRichard Sandiford2016-09-211-1/+43
* [AArch64][SVE 30/32] Add SVE instruction classesRichard Sandiford2016-09-211-0/+107
* [AArch64][SVE 28/32] Add SVE FP immediate operandsRichard Sandiford2016-09-211-0/+45
* [AArch64][SVE 27/32] Add SVE integer immediate operandsRichard Sandiford2016-09-211-17/+127
* [AArch64][SVE 26/32] Add SVE MUL VL addressing modesRichard Sandiford2016-09-211-0/+72
* [AArch64][SVE 25/32] Add support for SVE addressing modesRichard Sandiford2016-09-211-0/+146
* [AArch64][SVE 24/32] Add AARCH64_OPND_SVE_PATTERN_SCALEDRichard Sandiford2016-09-211-0/+20