| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Update year range in copyright notice of binutils files |   Alan Modra | 2019-01-01 | 284 | -283/+287 |
| * | ChangeLog rotation | Alan Modra | 2019-01-01 | 2 | -878/+892 |
| * | Update copyright year range in all GDB files. |   Joel Brobecker | 2019-01-01 | 22 | -22/+22 |
| * | PR24028, PPC_INT_FMT | Alan Modra | 2018-12-28 | 2 | -8/+5 |
| * | elf: Add PT_GNU_PROPERTY segment type |   H.J. Lu | 2018-12-14 | 2 | -3/+7 |
| * | Fix a failure in the libiberty testsuite by increasing the recursion limit to... |   Nick Clifton | 2018-12-11 | 2 | -1/+6 |
| * | elf: Report property change when merging properties | H.J. Lu | 2018-12-07 | 2 | -0/+7 |
| * | Synchronize libiberty with gcc and add --no-recruse-limit option to tools tha... | Nick Clifton | 2018-12-07 | 2 | -0/+19 |
| * | PowerPC @l, @h and @ha warnings, plus VLE e_li | Alan Modra | 2018-12-06 | 2 | -0/+9 |
| * | opcodes/riscv: Hide '.L0 ' fake symbols |   Andrew Burgess | 2018-12-06 | 3 | -0/+13 |
| * | RISC-V: Accept version, supervisor ext and more than one NSE for -march. |   Jim Wilson | 2018-12-03 | 2 | -1/+6 |
| * | RISC-V: Add .insn CA support. | Jim Wilson | 2018-11-27 | 2 | -0/+9 |
| * | [ARM] Improve indentation of ARM architecture declarations |   Thomas Preud'homme | 2018-11-13 | 2 | -254/+340 |
| * | [BINUTILS, AARCH64, 6/8] Add Tag getting instruction in Memory Tagging Extension |   Sudakshina Das | 2018-11-12 | 2 | -0/+7 |
| * | [BINUTILS, AARCH64, 4/8] Add Tag setting instructions in Memory Tagging Exten... | Sudakshina Das | 2018-11-12 | 2 | -0/+14 |
| * | [BINUTILS, AARCH64, 2/8] Add Tag generation instructions in Memory Tagging Ex... | Sudakshina Das | 2018-11-12 | 2 | -0/+7 |
| * | [BINUTILS, AARCH64, 1/8] Add support for Memory Tagging Extension for ARMv8.5-A | Sudakshina Das | 2018-11-12 | 2 | -0/+6 |
| * | Add support for new load commands added by Apple to the MACH-O file format. |   Roman Bolshakov | 2018-11-07 | 3 | -28/+55 |
| * | Add support for a couple of new Mach-O commands. | Nick Clifton | 2018-11-06 | 2 | -1/+7 |
| * | [BINUTILS, ARM] Add Armv8.5-A to select_arm_features and update macros. | Sudakshina Das | 2018-11-06 | 2 | -4/+9 |
| * | Support AT_HWCAP2 on FreeBSD. |   John Baldwin | 2018-10-26 | 2 | -0/+5 |
| * | S12Z: New 32 bit Reloc. |   John Darrington | 2018-10-23 | 1 | -1/+2 |
| * | [PATCH, BINUTULS, AARCH64, 9/9] Add SSBS to MSR/MRS | Sudakshina Das | 2018-10-09 | 2 | -1/+9 |
| * | [PATCH, BINUTILS, AARCH64, 8/9] Add SCXTNUM_ELx and ID_PFR2_EL1 system registers | Sudakshina Das | 2018-10-09 | 2 | -1/+14 |
| * | [PATCH, BINUTILS, AARCH64, 7/9] Add BTI instruction | Sudakshina Das | 2018-10-09 | 2 | -1/+21 |
| * | [PATCH, BINUTILS, AARCH64, 6/9] Add Random number instructions | Sudakshina Das | 2018-10-09 | 2 | -0/+6 |
| * | [PATCH, BINUTILS, AARCH64, 5/9] Add DC CVADP instruction | Sudakshina Das | 2018-10-09 | 2 | -1/+8 |
| * | [PATCH, BINUTILS, AARCH64, 4/9] Add Execution and Data Restriction instructions | Sudakshina Das | 2018-10-09 | 2 | -1/+13 |
| * | [PATCH, BINUTILS, AARCH64, 3/9] Add instruction SB for ARMv8.5-A | Sudakshina Das | 2018-10-09 | 2 | -1/+9 |
| * | [PATCH, BINUTILS, AARCH64, 2/9] Add Data procoessing instructions for ARMv8.5-A | Sudakshina Das | 2018-10-09 | 2 | -1/+14 |
| * | [PATCH, BINUTILS, AARCH64, 1/9] Add -march=armv8.5-a and related internal fea... | Sudakshina Das | 2018-10-09 | 2 | -0/+9 |
| * | Separate header PT_LOAD for -z separate-code | Alan Modra | 2018-10-08 | 2 | -0/+7 |
| * | [Arm, 3/3] Add Execution and Data Prediction instructions for AArch32 | Sudakshina Das | 2018-10-05 | 2 | -1/+8 |
| * | [Arm, 2/3] Add instruction SB for AArch32 | Sudakshina Das | 2018-10-05 | 2 | -1/+8 |
| * | [Arm, 1/3] Add -march=armv8.5-a and related internal feature macros to AArch32 | Sudakshina Das | 2018-10-05 | 2 | -0/+10 |
| * | or1k: Add the l.adrp insn and supporting relocations |   Stafford Horne | 2018-10-05 | 2 | -0/+20 |
| * | or1k: Add relocations for high-signed and low-stores |   Richard Henderson | 2018-10-05 | 2 | -0/+13 |
| * | AArch64: Add SVE constraints verifier. |   Tamar Christina | 2018-10-03 | 2 | -2/+16 |
| * | AArch64: Refactor verifiers to make more general. | Tamar Christina | 2018-10-03 | 2 | -1/+8 |
| * | AArch64: Refactor err_type. | Tamar Christina | 2018-10-03 | 2 | -1/+16 |
| * | AArch64: Wire through instr_sequence | Tamar Christina | 2018-10-03 | 2 | -2/+27 |
| * | AArch64: Mark sve instructions that require MOVPRFX constraints | Tamar Christina | 2018-10-03 | 2 | -2/+22 |
| * | Make print_insn_s12z public. | John Darrington | 2018-10-03 | 2 | -0/+5 |
| * | RISC-V: Add fence.tso instruction |   Palmer Dabbelt | 2018-10-02 | 2 | -0/+7 |
| * | [ARC] Entries to Changelog for previous commits. |   Cupertino Miranda | 2018-10-02 | 1 | -0/+4 |
| * | [ARC] Fixed issue with DTSOFF relocs. | Cupertino Miranda | 2018-10-01 | 1 | -1/+1 |
| * | [ARC] Fixes TLS failures related to tls-align. | Cupertino Miranda | 2018-10-01 | 1 | -1/+1 |
| * | ELF: Don't include zero size sections at start of PT_NOTE segment | H.J. Lu | 2018-09-21 | 2 | -4/+12 |
| * | Andes Technology has good news for you, we plan to update the nds32 port of b... | Nick Clifton | 2018-09-20 | 4 | -43/+240 |
| * | Handle missing Solaris auxv entries |   Rainer Orth | 2018-09-20 | 2 | -3/+17 |
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