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path: root/bfd/elfnn-aarch64.c
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* [AArch64] Create .got section if _GLOBAL_OFFSET_TABLE_ referencedJiong Wang2016-03-071-0/+16
* [BFD][AARCH64]Fix MOVW_SABS_G(0,1,2) relocation overflow check.Renlin Li2016-02-261-3/+3
* Revert "ABS32"Renlin Li2016-02-241-15/+3
* ABS32Renlin Li2016-02-241-3/+15
* [AArch64] Remove redundant calculation of plt stub destination for veneerJiong Wang2016-02-221-16/+3
* Add a more helpful warning message to explain why some AArch64 relocations ca...Nick Clifton2016-02-091-4/+31
* Revert "Add a more helpful warning message to explain why some AArch64 reloca...Walfred Tedeschi2016-02-091-31/+4
* Add a more helpful warning message to explain why some AArch64 relocations ca...Nick Clifton2016-02-091-4/+31
* [AArch64] Relax long branch veneer insertion for non STT_FUNC symbolJiong Wang2016-01-211-6/+19
* Copyright update for binutilsAlan Modra2016-01-011-1/+1
* Revert "[LD][AARCH64]Add TLSIE relaxation support under large memory model."Marcus Shawcroft2015-11-121-51/+2
* Add support for AArch64 CloudABI binaries.Ed Schouten2015-10-291-0/+19
* [LD][AARCH64]Add TLSIE relaxation support under large memory model.Renlin Li2015-10-021-2/+51
* [LD][AARCH64]Add TLSDESC support for large memory model.Renlin Li2015-10-021-3/+102
* [GAS][AARCH64]Add TLSDESC large memory model support.Renlin Li2015-10-021-1/+1
* [BFD][AARCH64]Add TLSGD relaxation support under large memory model.Renlin Li2015-10-021-0/+60
* [BFD][AARCH64]Create GOT section for TLSLE_MOVW_TPREL_G(1, 1_NC, 2).Renlin Li2015-10-021-0/+3
* [Binutils][AARCH64]Add TLS IE large memory support.Renlin Li2015-10-021-28/+38
* [LD][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support.Renlin Li2015-10-021-0/+5
* [GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support.Renlin Li2015-10-021-0/+16
* [LD][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support.Renlin Li2015-10-021-0/+14
* [GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support.Renlin Li2015-10-021-0/+16
* [LD][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC Support.Renlin Li2015-10-021-0/+7
* [GAS][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC Support.Renlin Li2015-10-021-0/+15
* [LD][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 Support.Renlin Li2015-10-021-0/+7
* [GAS][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 Support.Renlin Li2015-10-021-0/+15
* [LD][AARCH64]Add BFD_RELOC_AARCH64_LD64_GOTOFF_LO15 Support.Renlin Li2015-10-021-0/+72
* [BFD][AARCH64]Refactor to facilitate further large memory model support patches.Renlin Li2015-10-021-4/+12
* [BFD][AARCH64]Emit single AARCH64_MAP_INSN symbol for the whole plt.Renlin Li2015-10-011-35/+1
* Add --no-dynamic-linker option to ld, for static PIE useRich Felker2015-09-201-1/+1
* [AArch64] Sort IS_AARCH64_TLS_RELAX_RELOC in alphabetic orderJiong Wang2015-09-091-8/+8
* [AArch64] Relax TLS local dynamic traditional into local executableJiong Wang2015-09-091-0/+53
* Make asection->id and asection->index unsignedAlan Modra2015-08-311-2/+2
* [AArch64][6/6] LD support TLSLD load/store relocation typesJiong Wang2015-08-191-0/+16
* [AArch64][5/6] GAS support TLSLD load/store relocation typesJiong Wang2015-08-191-0/+120
* [AArch64][4/6] LD support TLSLD move/add relocation typesJiong Wang2015-08-191-0/+12
* [AArch64][3/6] GAS support TLSLD move/add relocation typesJiong Wang2015-08-191-0/+90
* [AArch64][2/6] LD support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NCJiong Wang2015-08-191-0/+2
* [AArch64][1/6] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NCJiong Wang2015-08-191-0/+15
* [AArch64] Cleanup TLS relocation types which don't go through GOT tableJiong Wang2015-08-181-37/+0
* Add output_type to bfd_link_infoH.J. Lu2015-08-181-36/+39
* [AArch64] Improve BFD overflow warning message for -fpicJiong Wang2015-08-111-0/+13
* [AArch64]Speed up linking speed by skipping unncessary TLS reloc type checkJiong Wang2015-08-111-1/+15
* [AArch64] Long branch veneer support far symbol defined by --defsymJiong Wang2015-08-111-2/+4
* [AArch64] PR18668, repair long branch veneer for plt stubJiong Wang2015-08-111-31/+20
* [AArch64][8/8] LD support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12Jiong Wang2015-08-111-0/+8
* [AArch64][7/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12Jiong Wang2015-08-111-0/+15
* [AArch64][6/8] LD support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NCJiong Wang2015-08-111-1/+8
* [AArch64][5/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NCJiong Wang2015-08-111-0/+15
* [AArch64][3/8] LD support BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21Jiong Wang2015-08-111-2/+11