MIPS16e2: Add new MIPS16e2 ASE binutils and GAS tests

Verify MIPS16e2 ASE instruction assembly, disassembly and object file flags. binutils/ * testsuite/binutils-all/mips/mips16-undecoded.d: Add `-mips3' to `as' flags. * testsuite/binutils-all/mips/mips16e2-undecoded.d: New test. * testsuite/binutils-all/mips/mips16e2-extend-insn.d: New test. * testsuite/binutils-all/mips/mips16-undecoded.s: Remove `.module mips3'. * testsuite/binutils-all/mips/mips.exp: Run the new tests. gas/ * testsuite/gas/mips/mips16e2.d: New test. * testsuite/gas/mips/mips16e2-mt.d: New test. * testsuite/gas/mips/mips16e2-sub.d: New test. * testsuite/gas/mips/mips16e2@mips16e2-sub.d: New test. * testsuite/gas/mips/mips16e2-mt-sub.d: New test. * testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d: New test. * testsuite/gas/mips/mips16e2-hilo.d: New test. * testsuite/gas/mips/mips16e2-hilo-n32.d: New test. * testsuite/gas/mips/mips16e2-reloc-error.d: New test. * testsuite/gas/mips/mips16e2-imm-error.d: New test. * testsuite/gas/mips/elf_ase_mips16e2.d: New test. * testsuite/gas/mips/elf_ase_mips16e2-2.d: New test. * testsuite/gas/mips/elf-rel9-mips16e2.d: New test. * testsuite/gas/mips/mips16e2-lui.d: New test. * testsuite/gas/mips/mips16e2@mips32r2-sync.d: New test. * testsuite/gas/mips/mips16e2@mips32r2-sync-1.d: New test. * testsuite/gas/mips/mips16e2@lui-2.d: New test. * testsuite/gas/mips/mips16e2-reloc-error.l: New stderr output. * testsuite/gas/mips/mips16e2-imm-error.l: New stderr output. * testsuite/gas/mips/mips16e2@lui-2.l: New stderr output. * testsuite/gas/mips/mips16e2.s: New test source. * testsuite/gas/mips/mips16e2-mt.s: New test source. * testsuite/gas/mips/mips16e2-sub.s: New test source. * testsuite/gas/mips/mips16e2-mt-sub.s: New test source. * testsuite/gas/mips/mips16e2-hilo.s: New test source. * testsuite/gas/mips/mips16e2-reloc-error.s: New test source. * testsuite/gas/mips/mips16e2-imm-error.s: New test source. * testsuite/gas/mips/elf-rel9-mips16e2.s: New test source. * testsuite/gas/mips/mips16e2-lui.s: New test source. * testsuite/gas/mips/mips.exp: Expand `mips32r2-sync', `mips32r2-sync-1', `lui-1' and `lui-2' tests across MIPS16e2 architectures. Run the new tests.
author: Maciej W. Rozycki <macro@imgtec.com> 2017-05-15 13:45:42 +0100
committer: Maciej W. Rozycki <macro@imgtec.com> 2017-05-15 13:57:11 +0100
commit: 3f3467ffc4b0a397a7017b8ab729e4c0060b25f0 (patch)
tree: 0b5a9c3e25ca4cdcc7666e569ead5dea2bc1b09f /gas
parent: MIPS16e2: Add MIPS16e2 ASE GAS test infrastructure (diff)
download: binutils-gdb-3f3467ffc4b0a397a7017b8ab729e4c0060b25f0.tar.gz
binutils-gdb-3f3467ffc4b0a397a7017b8ab729e4c0060b25f0.tar.bz2
binutils-gdb-3f3467ffc4b0a397a7017b8ab729e4c0060b25f0.zip
31 files changed, 3425 insertions, 6 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 004c5f8fbd0..6cdca286249 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,40 @@
 2017-05-15  Maciej W. Rozycki  <macro@imgtec.com>
 
+	* testsuite/gas/mips/mips16e2.d: New test.
+	* testsuite/gas/mips/mips16e2-mt.d: New test.
+	* testsuite/gas/mips/mips16e2-sub.d: New test.
+	* testsuite/gas/mips/mips16e2@mips16e2-sub.d: New test.
+	* testsuite/gas/mips/mips16e2-mt-sub.d: New test.
+	* testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d: New test.
+	* testsuite/gas/mips/mips16e2-hilo.d: New test.
+	* testsuite/gas/mips/mips16e2-hilo-n32.d: New test.
+	* testsuite/gas/mips/mips16e2-reloc-error.d: New test.
+	* testsuite/gas/mips/mips16e2-imm-error.d: New test.
+	* testsuite/gas/mips/elf_ase_mips16e2.d: New test.
+	* testsuite/gas/mips/elf_ase_mips16e2-2.d: New test.
+	* testsuite/gas/mips/elf-rel9-mips16e2.d: New test.
+	* testsuite/gas/mips/mips16e2-lui.d: New test.
+	* testsuite/gas/mips/mips16e2@mips32r2-sync.d: New test.
+	* testsuite/gas/mips/mips16e2@mips32r2-sync-1.d: New test.
+	* testsuite/gas/mips/mips16e2@lui-2.d: New test.
+	* testsuite/gas/mips/mips16e2-reloc-error.l: New stderr output.
+	* testsuite/gas/mips/mips16e2-imm-error.l: New stderr output.
+	* testsuite/gas/mips/mips16e2@lui-2.l: New stderr output.
+	* testsuite/gas/mips/mips16e2.s: New test source.
+	* testsuite/gas/mips/mips16e2-mt.s: New test source.
+	* testsuite/gas/mips/mips16e2-sub.s: New test source.
+	* testsuite/gas/mips/mips16e2-mt-sub.s: New test source.
+	* testsuite/gas/mips/mips16e2-hilo.s: New test source.
+	* testsuite/gas/mips/mips16e2-reloc-error.s: New test source.
+	* testsuite/gas/mips/mips16e2-imm-error.s: New test source.
+	* testsuite/gas/mips/elf-rel9-mips16e2.s: New test source.
+	* testsuite/gas/mips/mips16e2-lui.s: New test source.
+	* testsuite/gas/mips/mips.exp: Expand `mips32r2-sync',
+	`mips32r2-sync-1', `lui-1' and `lui-2' tests across MIPS16e2
+	architectures.  Run the new tests.
+
+2017-05-15  Maciej W. Rozycki  <macro@imgtec.com>
+
 	* testsuite/gas/mips/mips.exp (run_dump_test_arch): Add
 	`mips16e2@' prefix.
 	(run_list_test_arch): Likewise.
diff --git a/gas/testsuite/gas/mips/elf-rel9-mips16e2.d b/gas/testsuite/gas/mips/elf-rel9-mips16e2.d
new file mode 100644
index 00000000000..d27343f00d8
--- /dev/null
+++ b/gas/testsuite/gas/mips/elf-rel9-mips16e2.d
@@ -0,0 +1,69 @@
+#as: -march=mips32r2 -mmips16e2 -mabi=32
+#objdump: -M gpr-names=numeric -dr
+#name: MIPS ELF reloc 9 (MIPS16e2 version)
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0+00 <foo>:
+[ 	]*[0-9a-f]+:	659a      	move	\$28,\$2
+[ 	]*[0-9a-f]+:	f000 9420 	lw	\$4,0\(\$28\)
+[ 	]*[0-9a-f]+: R_MIPS16_GOT16	\.data
+[ 	]*[0-9a-f]+:	f000 4c10 	addiu	\$4,16
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.data
+[ 	]*[0-9a-f]+:	f000 9420 	lw	\$4,0\(\$28\)
+[ 	]*[0-9a-f]+: R_MIPS16_GOT16	\.data
+[ 	]*[0-9a-f]+:	f020 4c00 	addiu	\$4,32
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.data
+[ 	]*[0-9a-f]+:	f000 9420 	lw	\$4,0\(\$28\)
+[ 	]*[0-9a-f]+: R_MIPS16_GOT16	\.data
+[ 	]*[0-9a-f]+:	f7ef 4c1c 	addiu	\$4,32764
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.data
+[ 	]*[0-9a-f]+:	f000 9421 	lw	\$4,1\(\$28\)
+[ 	]*[0-9a-f]+: R_MIPS16_GOT16	\.data
+[ 	]*[0-9a-f]+:	f010 4c00 	addiu	\$4,-32768
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.data
+[ 	]*[0-9a-f]+:	f000 9421 	lw	\$4,1\(\$28\)
+[ 	]*[0-9a-f]+: R_MIPS16_GOT16	\.data
+[ 	]*[0-9a-f]+:	f7ff 4c1c 	addiu	\$4,-4
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.data
+[ 	]*[0-9a-f]+:	f000 9421 	lw	\$4,1\(\$28\)
+[ 	]*[0-9a-f]+: R_MIPS16_GOT16	\.data
+[ 	]*[0-9a-f]+:	f000 4c00 	addiu	\$4,0
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.data
+[ 	]*[0-9a-f]+:	f000 9422 	lw	\$4,2\(\$28\)
+[ 	]*[0-9a-f]+: R_MIPS16_GOT16	\.data
+[ 	]*[0-9a-f]+:	f010 4c10 	addiu	\$4,-32752
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.data
+[ 	]*[0-9a-f]+:	f000 9422 	lw	\$4,2\(\$28\)
+[ 	]*[0-9a-f]+: R_MIPS16_GOT16	\.data
+[ 	]*[0-9a-f]+:	f01e 4c00 	addiu	\$4,-4096
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.data
+[ 	]*[0-9a-f]+:	f000 9422 	lw	\$4,2\(\$28\)
+[ 	]*[0-9a-f]+: R_MIPS16_GOT16	\.data
+[ 	]*[0-9a-f]+:	f7ff 4c1f 	addiu	\$4,-1
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.data
+[ 	]*[0-9a-f]+:	f000 9422 	lw	\$4,2\(\$28\)
+[ 	]*[0-9a-f]+: R_MIPS16_GOT16	\.data
+[ 	]*[0-9a-f]+:	f000 4c00 	addiu	\$4,0
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.data
+[ 	]*[0-9a-f]+:	f000 9423 	lw	\$4,3\(\$28\)
+[ 	]*[0-9a-f]+: R_MIPS16_GOT16	\.data
+[ 	]*[0-9a-f]+:	f342 4c05 	addiu	\$4,4933
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.data
+[ 	]*[0-9a-f]+:	f000 9420 	lw	\$4,0\(\$28\)
+[ 	]*[0-9a-f]+: R_MIPS16_GPREL	\.sdata
+[ 	]*[0-9a-f]+:	f000 9424 	lw	\$4,4\(\$28\)
+[ 	]*[0-9a-f]+: R_MIPS16_GPREL	\.sdata
+[ 	]*[0-9a-f]+:	f000 9424 	lw	\$4,4\(\$28\)
+[ 	]*[0-9a-f]+: R_MIPS16_GPREL	\.sdata
+[ 	]*[0-9a-f]+:	f000 9428 	lw	\$4,8\(\$28\)
+[ 	]*[0-9a-f]+: R_MIPS16_GPREL	\.sdata
+[ 	]*[0-9a-f]+:	f000 942c 	lw	\$4,12\(\$28\)
+[ 	]*[0-9a-f]+: R_MIPS16_GPREL	\.sdata
+[ 	]*[0-9a-f]+:	f000 9434 	lw	\$4,20\(\$28\)
+[ 	]*[0-9a-f]+: R_MIPS16_GPREL	\.sdata
+[ 	]*[0-9a-f]+:	f000 9438 	lw	\$4,24\(\$28\)
+[ 	]*[0-9a-f]+: R_MIPS16_GPREL	\.sdata
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/elf-rel9-mips16e2.s b/gas/testsuite/gas/mips/elf-rel9-mips16e2.s
new file mode 100644
index 00000000000..d2c9ce05da7
--- /dev/null
+++ b/gas/testsuite/gas/mips/elf-rel9-mips16e2.s
@@ -0,0 +1,62 @@
+	.set	mips16
+	.ent	foo
+foo:
+	move	$28, $2
+	lw	$4,%got(l1)($28)
+	addiu	$4,%lo(l1)
+
+	lw	$4,%got(l1 + 16)($28)
+	addiu	$4,%lo(l1 + 16)
+
+	lw	$4,%got(l1 + 0x7fec)($28)
+	addiu	$4,%lo(l1 + 0x7fec)
+
+	lw	$4,%got(l1 + 0x7ff0)($28)
+	addiu	$4,%lo(l1 + 0x7ff0)
+
+	lw	$4,%got(l1 + 0xffec)($28)
+	addiu	$4,%lo(l1 + 0xffec)
+
+	lw	$4,%got(l1 + 0xfff0)($28)
+	addiu	$4,%lo(l1 + 0xfff0)
+
+	lw	$4,%got(l1 + 0x18000)($28)
+	addiu	$4,%lo(l1 + 0x18000)
+
+	lw	$4,%got(l2)($28)
+	addiu	$4,%lo(l2)
+
+	lw	$4,%got(l2 + 0xfff)($28)
+	addiu	$4,%lo(l2 + 0xfff)
+
+	lw	$4,%got(l2 + 0x1000)($28)
+	addiu	$4,%lo(l2 + 0x1000)
+
+	lw	$4,%got(l2 + 0x12345)($28)
+	addiu	$4,%lo(l2 + 0x12345)
+
+	lw	$4,%gprel(l3)($28)
+	lw	$4,%gprel(l3 + 4)($28)
+	lw	$4,%gprel(l4)($28)
+	lw	$4,%gprel(l4 + 4)($28)
+	lw	$4,%gprel(l5)($28)
+	lw	$4,%gprel(l5 + 8)($28)
+	lw	$4,%gprel(l5 + 12)($28)
+
+	.end	foo
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.space	16
+	.align	4, 0
+
+	.data
+	.word	1,2,3,4
+l1:	.word	4,5
+	.space	0x1f000 - 24
+l2:	.word	7,8
+
+	.sdata
+l3:	.word	1
+l4:	.word	2
+	.word	3
+l5:	.word	4
diff --git a/gas/testsuite/gas/mips/elf_ase_mips16e2-2.d b/gas/testsuite/gas/mips/elf_ase_mips16e2-2.d
new file mode 100644
index 00000000000..399b75169b7
--- /dev/null
+++ b/gas/testsuite/gas/mips/elf_ase_mips16e2-2.d
@@ -0,0 +1,21 @@
+#name: ELF MIPS16e2 ASE markings 2
+#source: nop.s
+#objdump: -p
+#as: -32 -mips16 -mips32r2 -mmips16e2
+
+.*:.*file format.*mips.*
+private flags = [0-9a-f]*[4-7c-f]......: .*[[,]mips16[],].*
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS.*
+GPR size: 32
+CPR1 size: 32
+CPR2 size: 0
+FP ABI: Hard float \(double precision\)
+ISA Extension: .*
+ASEs:
+	MIPS16 ASE
+	MIPS16e2 ASE
+FLAGS 1: 0000000.
+FLAGS 2: 00000000
diff --git a/gas/testsuite/gas/mips/elf_ase_mips16e2.d b/gas/testsuite/gas/mips/elf_ase_mips16e2.d
new file mode 100644
index 00000000000..384adcc7491
--- /dev/null
+++ b/gas/testsuite/gas/mips/elf_ase_mips16e2.d
@@ -0,0 +1,5 @@
+#name: ELF MIPS16e2 ASE markings
+#source: empty.s
+#objdump: -p
+#as: -32 -mips16 -mips32r2 -mmips16e2
+#dump: elf_ase_mips16.d
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index a024ee542f3..7b20b4cb620 100644
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -896,11 +896,17 @@ if { [istarget mips*-*-vxworks*] } {
     # Check MIPS16e extensions
     run_dump_test_arches "mips16e"	[mips_arch_list_matching mips16e-32]
     run_dump_test_arches "mips16e-64"	[mips_arch_list_matching mips16e-32]
+    # Check MIPS16e2 extensions.
+    run_dump_test_arches "mips16e2"	[mips_arch_list_matching mips16e2-32]
+    run_dump_test_arches "mips16e2-mt"	[mips_arch_list_matching mips16e2-32]
     # Check MIPS16 ISA subset disassembly
     run_dump_test_arches "mips16-sub"	[mips_arch_list_matching mips16-32]
     run_dump_test_arches "mips16e-sub"	[mips_arch_list_matching mips16-32]
     run_dump_test_arches "mips16e-64-sub" \
 					[mips_arch_list_matching mips16-32]
+    run_dump_test_arches "mips16e2-sub"	[mips_arch_list_matching mips16-32]
+    run_dump_test_arches "mips16e2-mt-sub" \
+					[mips_arch_list_matching mips16-32]
 
     # Check jalx handling
     run_dump_test "mips16-jalx"
@@ -975,12 +981,16 @@ if { [istarget mips*-*-vxworks*] } {
 
     # Check MIPS16 HI16/LO16 relocations
     run_dump_test "mips16-hilo"
+    run_dump_test "mips16e2-hilo"
     if $has_newabi {
 	run_dump_test "mips16-hilo-n32"
+	run_dump_test "mips16e2-hilo-n32"
     }
     run_dump_test "mips16-hilo-match"
     run_dump_test "mips16-reloc-error"
+    run_dump_test "mips16e2-reloc-error"
     run_dump_test "mips16-reg-error"
+    run_dump_test "mips16e2-imm-error"
 
     run_dump_test "delay"
     run_dump_test "nodelay"
@@ -1106,6 +1116,8 @@ if { [istarget mips*-*-vxworks*] } {
     # Verify that ASE markings are handled properly.
     run_dump_test "elf_ase_mips16"
     run_dump_test "elf_ase_mips16-2"
+    run_dump_test "elf_ase_mips16e2"
+    run_dump_test "elf_ase_mips16e2-2"
 
     run_dump_test "elf_ase_micromips"
     run_dump_test "elf_ase_micromips-2"
@@ -1137,6 +1149,7 @@ if { [istarget mips*-*-vxworks*] } {
     run_dump_test "elf-rel8-mips16"
     run_dump_test "elf-rel9"
     run_dump_test "elf-rel9-mips16"
+    run_dump_test "elf-rel9-mips16e2"
     if $has_newabi {
 	run_dump_test "elf-rel10"
 	run_dump_test "elf-rel11"
@@ -1372,6 +1385,8 @@ if { [istarget mips*-*-vxworks*] } {
     run_dump_test "mips16e-jrc"
     run_dump_test "mips16e-save"
     run_list_test "mips16e-save-err" "-march=mips32 -32"
+    run_dump_test "mips16e2-lui"
+
     run_dump_test "mips16-intermix"
     run_dump_test "mips16-extend"
     run_dump_test "mips16-extend-swap"
@@ -1416,10 +1431,12 @@ if { [istarget mips*-*-vxworks*] } {
     run_dump_test "mips16-vis-1"
     run_dump_test "call-nonpic-1"
     run_dump_test "mips32-sync"
-    run_dump_test_arches "mips32r2-sync" \
-					[mips_arch_list_matching mips32r2]
-    run_dump_test_arches "mips32r2-sync-1" \
-					[mips_arch_list_matching mips32r2]
+    run_dump_test_arches "mips32r2-sync" [lsort -dictionary -unique [concat \
+					[mips_arch_list_matching mips32r2] \
+					[mips_arch_list_matching mips16e2-32]]]
+    run_dump_test_arches "mips32r2-sync-1" [lsort -dictionary -unique [concat \
+					[mips_arch_list_matching mips32r2] \
+					[mips_arch_list_matching mips16e2-32]]]
     run_dump_test_arches "alnv_ps-swap" [mips_arch_list_matching fpisa5 \
 						!mips32r6]
     run_dump_test_arches "cache" [lsort -dictionary -unique [concat \
@@ -1476,8 +1493,12 @@ if { [istarget mips*-*-vxworks*] } {
 	run_dump_test_arches "hilo-diff-el-n64" [mips_arch_list_matching mips3]
     }
     run_dump_test_arches "lui"		[mips_arch_list_matching mips1]
-    run_dump_test_arches "lui-1"	[mips_arch_list_matching mips1]
-    run_dump_test_arches "lui-2"	[mips_arch_list_matching mips1]
+    run_dump_test_arches "lui-1"	[lsort -dictionary -unique [concat \
+					[mips_arch_list_matching mips1] \
+					[mips_arch_list_matching mips16e2-32]]]
+    run_dump_test_arches "lui-2"	[lsort -dictionary -unique [concat \
+					[mips_arch_list_matching mips1] \
+					[mips_arch_list_matching mips16e2-32]]]
     run_dump_test_arches "addiu-error"	[mips_arch_list_all]
     run_dump_test_arches "break-error"	[mips_arch_list_all]
 
diff --git a/gas/testsuite/gas/mips/mips16e2-hilo-n32.d b/gas/testsuite/gas/mips/mips16e2-hilo-n32.d
new file mode 100644
index 00000000000..b5df2b93e96
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-hilo-n32.d
@@ -0,0 +1,419 @@
+#objdump: -dr
+#name: MIPS16e2 lui/addi n32
+#as: -mips16 -mabi=n32 -march=mips64r2 -mmips16e2
+#source: mips16e2-hilo.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+
+0+0000 <stuff>:
+[ 	]*[0-9a-f]+:	f000 6c20 	lui	a0,0x0
+[ 	]*[0-9a-f]+:	4c00      	addiu	a0,0
+[ 	]*[0-9a-f]+:	f000 6c20 	lui	a0,0x0
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+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	small_external_data_label\+0x1
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	small_external_data_label\+0x1
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	big_external_common\+0x1
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	big_external_common\+0x1
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	small_external_common\+0x1
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	small_external_common\+0x1
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.bss\+0x1
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.bss\+0x1
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.sbss\+0x1
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.sbss\+0x1
+[ 	]*[0-9a-f]+:	f000 6d21 	lui	a1,0x1
+[ 	]*[0-9a-f]+:	f010 9d80 	lw	a0,-32768\(a1\)
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.data\+0x8000
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.data\+0x8000
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.data\+0x8004
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.data\+0x8004
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	big_external_data_label\+0x8000
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	big_external_data_label\+0x8000
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	small_external_data_label\+0x8000
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	small_external_data_label\+0x8000
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	big_external_common\+0x8000
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	big_external_common\+0x8000
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	small_external_common\+0x8000
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	small_external_common\+0x8000
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.bss\+0x8000
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.bss\+0x8000
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.sbss\+0x8000
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.sbss\+0x8000
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+:	f010 9d80 	lw	a0,-32768\(a1\)
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.data-0x8000
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.data-0x8000
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.data-0x7ffc
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.data-0x7ffc
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	big_external_data_label-0x8000
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	big_external_data_label-0x8000
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	small_external_data_label-0x8000
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	small_external_data_label-0x8000
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	big_external_common-0x8000
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	big_external_common-0x8000
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	small_external_common-0x8000
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	small_external_common-0x8000
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.bss-0x8000
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.bss-0x8000
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.sbss-0x8000
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.sbss-0x8000
+[ 	]*[0-9a-f]+:	f000 6d21 	lui	a1,0x1
+[ 	]*[0-9a-f]+:	9d80      	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.data\+0x10000
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.data\+0x10000
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.data\+0x10004
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.data\+0x10004
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	big_external_data_label\+0x10000
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	big_external_data_label\+0x10000
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	small_external_data_label\+0x10000
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	small_external_data_label\+0x10000
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	big_external_common\+0x10000
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	big_external_common\+0x10000
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	small_external_common\+0x10000
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	small_external_common\+0x10000
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.bss\+0x10000
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.bss\+0x10000
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.sbss\+0x10000
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.sbss\+0x10000
+[ 	]*[0-9a-f]+:	f000 6d22 	lui	a1,0x2
+[ 	]*[0-9a-f]+:	f5b4 9d85 	lw	a0,-23131\(a1\)
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.data\+0x1a5a5
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.data\+0x1a5a5
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.data\+0x1a5a9
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.data\+0x1a5a9
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	big_external_data_label\+0x1a5a5
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	big_external_data_label\+0x1a5a5
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	small_external_data_label\+0x1a5a5
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	small_external_data_label\+0x1a5a5
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	big_external_common\+0x1a5a5
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	big_external_common\+0x1a5a5
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	small_external_common\+0x1a5a5
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	small_external_common\+0x1a5a5
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.bss\+0x1a5a5
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.bss\+0x1a5a5
+[ 	]*[0-9a-f]+:	f000 6d20 	lui	a1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.sbss\+0x1a5a5
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.sbss\+0x1a5a5
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/mips16e2-hilo.d b/gas/testsuite/gas/mips/mips16e2-hilo.d
new file mode 100644
index 00000000000..49dca2db7ee
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-hilo.d
@@ -0,0 +1,419 @@
+#objdump: -dr
+#name: MIPS16e2 lui/addi
+#as: -mips16 -mabi=32 -march=mips32r2 -mmips16e2
+#source: mips16e2-hilo.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+
+0+0000 <stuff>:
+[ 	]*[0-9a-f]+:	f000 6c20 	lui	a0,0x0
+[ 	]*[0-9a-f]+:	4c00      	addiu	a0,0
+[ 	]*[0-9a-f]+:	f000 6c20 	lui	a0,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.data
+[ 	]*[0-9a-f]+:	f000 4c00 	addiu	a0,0
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.data
+[ 	]*[0-9a-f]+:	f000 6c20 	lui	a0,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.data
+[ 	]*[0-9a-f]+:	f000 4c04 	addiu	a0,4
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.data
+[ 	]*[0-9a-f]+:	f000 6c20 	lui	a0,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	big_external_data_label
+[ 	]*[0-9a-f]+:	f000 4c00 	addiu	a0,0
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	big_external_data_label
+[ 	]*[0-9a-f]+:	f000 6c20 	lui	a0,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	small_external_data_label
+[ 	]*[0-9a-f]+:	f000 4c00 	addiu	a0,0
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	small_external_data_label
+[ 	]*[0-9a-f]+:	f000 6c20 	lui	a0,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	big_external_common
+[ 	]*[0-9a-f]+:	f000 4c00 	addiu	a0,0
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	big_external_common
+[ 	]*[0-9a-f]+:	f000 6c20 	lui	a0,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	small_external_common
+[ 	]*[0-9a-f]+:	f000 4c00 	addiu	a0,0
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	small_external_common
+[ 	]*[0-9a-f]+:	f000 6c20 	lui	a0,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.bss
+[ 	]*[0-9a-f]+:	f000 4c00 	addiu	a0,0
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.bss
+[ 	]*[0-9a-f]+:	f000 6c20 	lui	a0,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.sbss
+[ 	]*[0-9a-f]+:	f000 4c00 	addiu	a0,0
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.sbss
+[ 	]*[0-9a-f]+:	f000 6c20 	lui	a0,0x0
+[ 	]*[0-9a-f]+:	4c01      	addiu	a0,1
+[ 	]*[0-9a-f]+:	f000 6c20 	lui	a0,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.data
+[ 	]*[0-9a-f]+:	f000 4c01 	addiu	a0,1
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.data
+[ 	]*[0-9a-f]+:	f000 6c20 	lui	a0,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.data
+[ 	]*[0-9a-f]+:	f000 4c05 	addiu	a0,5
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.data
+[ 	]*[0-9a-f]+:	f000 6c20 	lui	a0,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	big_external_data_label
+[ 	]*[0-9a-f]+:	f000 4c01 	addiu	a0,1
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	big_external_data_label
+[ 	]*[0-9a-f]+:	f000 6c20 	lui	a0,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	small_external_data_label
+[ 	]*[0-9a-f]+:	f000 4c01 	addiu	a0,1
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	small_external_data_label
+[ 	]*[0-9a-f]+:	f000 6c20 	lui	a0,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	big_external_common
+[ 	]*[0-9a-f]+:	f000 4c01 	addiu	a0,1
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	big_external_common
+[ 	]*[0-9a-f]+:	f000 6c20 	lui	a0,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	small_external_common
+[ 	]*[0-9a-f]+:	f000 4c01 	addiu	a0,1
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	small_external_common
+[ 	]*[0-9a-f]+:	f000 6c20 	lui	a0,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.bss
+[ 	]*[0-9a-f]+:	f000 4c01 	addiu	a0,1
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.bss
+[ 	]*[0-9a-f]+:	f000 6c20 	lui	a0,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.sbss
+[ 	]*[0-9a-f]+:	f000 4c01 	addiu	a0,1
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.sbss
+[ 	]*[0-9a-f]+:	f000 6c21 	lui	a0,0x1
+[ 	]*[0-9a-f]+:	f010 4c00 	addiu	a0,-32768
+[ 	]*[0-9a-f]+:	f000 6c21 	lui	a0,0x1
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.data
+[ 	]*[0-9a-f]+:	f010 4c00 	addiu	a0,-32768
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.data
+[ 	]*[0-9a-f]+:	f000 6c21 	lui	a0,0x1
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.data
+[ 	]*[0-9a-f]+:	f010 4c04 	addiu	a0,-32764
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.data
+[ 	]*[0-9a-f]+:	f000 6c21 	lui	a0,0x1
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	big_external_data_label
+[ 	]*[0-9a-f]+:	f010 4c00 	addiu	a0,-32768
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	big_external_data_label
+[ 	]*[0-9a-f]+:	f000 6c21 	lui	a0,0x1
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+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.sbss
+[ 	]*[0-9a-f]+:	f000 6d21 	lui	a1,0x1
+[ 	]*[0-9a-f]+:	9d80      	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+:	f000 6d21 	lui	a1,0x1
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.data
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.data
+[ 	]*[0-9a-f]+:	f000 6d21 	lui	a1,0x1
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.data
+[ 	]*[0-9a-f]+:	f000 9d84 	lw	a0,4\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.data
+[ 	]*[0-9a-f]+:	f000 6d21 	lui	a1,0x1
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	big_external_data_label
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	big_external_data_label
+[ 	]*[0-9a-f]+:	f000 6d21 	lui	a1,0x1
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	small_external_data_label
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	small_external_data_label
+[ 	]*[0-9a-f]+:	f000 6d21 	lui	a1,0x1
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	big_external_common
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	big_external_common
+[ 	]*[0-9a-f]+:	f000 6d21 	lui	a1,0x1
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	small_external_common
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	small_external_common
+[ 	]*[0-9a-f]+:	f000 6d21 	lui	a1,0x1
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.bss
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.bss
+[ 	]*[0-9a-f]+:	f000 6d21 	lui	a1,0x1
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.sbss
+[ 	]*[0-9a-f]+:	f000 9d80 	lw	a0,0\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.sbss
+[ 	]*[0-9a-f]+:	f000 6d22 	lui	a1,0x2
+[ 	]*[0-9a-f]+:	f5b4 9d85 	lw	a0,-23131\(a1\)
+[ 	]*[0-9a-f]+:	f000 6d22 	lui	a1,0x2
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.data
+[ 	]*[0-9a-f]+:	f5b4 9d85 	lw	a0,-23131\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.data
+[ 	]*[0-9a-f]+:	f000 6d22 	lui	a1,0x2
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.data
+[ 	]*[0-9a-f]+:	f5b4 9d89 	lw	a0,-23127\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.data
+[ 	]*[0-9a-f]+:	f000 6d22 	lui	a1,0x2
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	big_external_data_label
+[ 	]*[0-9a-f]+:	f5b4 9d85 	lw	a0,-23131\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	big_external_data_label
+[ 	]*[0-9a-f]+:	f000 6d22 	lui	a1,0x2
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	small_external_data_label
+[ 	]*[0-9a-f]+:	f5b4 9d85 	lw	a0,-23131\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	small_external_data_label
+[ 	]*[0-9a-f]+:	f000 6d22 	lui	a1,0x2
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	big_external_common
+[ 	]*[0-9a-f]+:	f5b4 9d85 	lw	a0,-23131\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	big_external_common
+[ 	]*[0-9a-f]+:	f000 6d22 	lui	a1,0x2
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	small_external_common
+[ 	]*[0-9a-f]+:	f5b4 9d85 	lw	a0,-23131\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	small_external_common
+[ 	]*[0-9a-f]+:	f000 6d22 	lui	a1,0x2
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.bss
+[ 	]*[0-9a-f]+:	f5b4 9d85 	lw	a0,-23131\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.bss
+[ 	]*[0-9a-f]+:	f000 6d22 	lui	a1,0x2
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	\.sbss
+[ 	]*[0-9a-f]+:	f5b4 9d85 	lw	a0,-23131\(a1\)
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	\.sbss
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/mips16e2-hilo.s b/gas/testsuite/gas/mips/mips16e2-hilo.s
new file mode 100644
index 00000000000..f16a3541ff4
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-hilo.s
@@ -0,0 +1,239 @@
+# Source file used to test li/addi on MIPS16e2
+
+	.set	mips16
+
+	.data
+data_label:
+	.word	0
+data_label2:
+	.word	0
+
+	.extern big_external_data_label,1000
+	.extern small_external_data_label,1
+	.comm big_external_common,1000
+	.comm small_external_common,1
+	.lcomm big_local_common,1000
+	.lcomm small_local_common,1
+
+	.text
+stuff:
+	lui	$4,%hi(0)
+	addiu	$4,%lo(0)
+	lui	$4,%hi(data_label)
+	addiu	$4,%lo(data_label)
+	lui	$4,%hi(data_label2)
+	addiu	$4,%lo(data_label2)
+	lui	$4,%hi(big_external_data_label)
+	addiu	$4,%lo(big_external_data_label)
+	lui	$4,%hi(small_external_data_label)
+	addiu	$4,%lo(small_external_data_label)
+	lui	$4,%hi(big_external_common)
+	addiu	$4,%lo(big_external_common)
+	lui	$4,%hi(small_external_common)
+	addiu	$4,%lo(small_external_common)
+	lui	$4,%hi(big_local_common)
+	addiu	$4,%lo(big_local_common)
+	lui	$4,%hi(small_local_common)
+	addiu	$4,%lo(small_local_common)
+	lui	$4,%hi(1)
+	addiu	$4,%lo(1)
+	lui	$4,%hi(data_label+1)
+	addiu	$4,%lo(data_label+1)
+	lui	$4,%hi(data_label2+1)
+	addiu	$4,%lo(data_label2+1)
+	lui	$4,%hi(big_external_data_label+1)
+	addiu	$4,%lo(big_external_data_label+1)
+	lui	$4,%hi(small_external_data_label+1)
+	addiu	$4,%lo(small_external_data_label+1)
+	lui	$4,%hi(big_external_common+1)
+	addiu	$4,%lo(big_external_common+1)
+	lui	$4,%hi(small_external_common+1)
+	addiu	$4,%lo(small_external_common+1)
+	lui	$4,%hi(big_local_common+1)
+	addiu	$4,%lo(big_local_common+1)
+	lui	$4,%hi(small_local_common+1)
+	addiu	$4,%lo(small_local_common+1)
+	lui	$4,%hi(0x8000)
+	addiu	$4,%lo(0x8000)
+	lui	$4,%hi(data_label+0x8000)
+	addiu	$4,%lo(data_label+0x8000)
+	lui	$4,%hi(data_label2+0x8000)
+	addiu	$4,%lo(data_label2+0x8000)
+	lui	$4,%hi(big_external_data_label+0x8000)
+	addiu	$4,%lo(big_external_data_label+0x8000)
+	lui	$4,%hi(small_external_data_label+0x8000)
+	addiu	$4,%lo(small_external_data_label+0x8000)
+	lui	$4,%hi(big_external_common+0x8000)
+	addiu	$4,%lo(big_external_common+0x8000)
+	lui	$4,%hi(small_external_common+0x8000)
+	addiu	$4,%lo(small_external_common+0x8000)
+	lui	$4,%hi(big_local_common+0x8000)
+	addiu	$4,%lo(big_local_common+0x8000)
+	lui	$4,%hi(small_local_common+0x8000)
+	addiu	$4,%lo(small_local_common+0x8000)
+	lui	$4,%hi(-0x8000)
+	addiu	$4,%lo(-0x8000)
+	lui	$4,%hi(data_label-0x8000)
+	addiu	$4,%lo(data_label-0x8000)
+	lui	$4,%hi(data_label2-0x8000)
+	addiu	$4,%lo(data_label2-0x8000)
+	lui	$4,%hi(big_external_data_label-0x8000)
+	addiu	$4,%lo(big_external_data_label-0x8000)
+	lui	$4,%hi(small_external_data_label-0x8000)
+	addiu	$4,%lo(small_external_data_label-0x8000)
+	lui	$4,%hi(big_external_common-0x8000)
+	addiu	$4,%lo(big_external_common-0x8000)
+	lui	$4,%hi(small_external_common-0x8000)
+	addiu	$4,%lo(small_external_common-0x8000)
+	lui	$4,%hi(big_local_common-0x8000)
+	addiu	$4,%lo(big_local_common-0x8000)
+	lui	$4,%hi(small_local_common-0x8000)
+	addiu	$4,%lo(small_local_common-0x8000)
+	lui	$4,%hi(0x10000)
+	addiu	$4,%lo(0x10000)
+	lui	$4,%hi(data_label+0x10000)
+	addiu	$4,%lo(data_label+0x10000)
+	lui	$4,%hi(data_label2+0x10000)
+	addiu	$4,%lo(data_label2+0x10000)
+	lui	$4,%hi(big_external_data_label+0x10000)
+	addiu	$4,%lo(big_external_data_label+0x10000)
+	lui	$4,%hi(small_external_data_label+0x10000)
+	addiu	$4,%lo(small_external_data_label+0x10000)
+	lui	$4,%hi(big_external_common+0x10000)
+	addiu	$4,%lo(big_external_common+0x10000)
+	lui	$4,%hi(small_external_common+0x10000)
+	addiu	$4,%lo(small_external_common+0x10000)
+	lui	$4,%hi(big_local_common+0x10000)
+	addiu	$4,%lo(big_local_common+0x10000)
+	lui	$4,%hi(small_local_common+0x10000)
+	addiu	$4,%lo(small_local_common+0x10000)
+	lui	$4,%hi(0x1a5a5)
+	addiu	$4,%lo(0x1a5a5)
+	lui	$4,%hi(data_label+0x1a5a5)
+	addiu	$4,%lo(data_label+0x1a5a5)
+	lui	$4,%hi(data_label2+0x1a5a5)
+	addiu	$4,%lo(data_label2+0x1a5a5)
+	lui	$4,%hi(big_external_data_label+0x1a5a5)
+	addiu	$4,%lo(big_external_data_label+0x1a5a5)
+	lui	$4,%hi(small_external_data_label+0x1a5a5)
+	addiu	$4,%lo(small_external_data_label+0x1a5a5)
+	lui	$4,%hi(big_external_common+0x1a5a5)
+	addiu	$4,%lo(big_external_common+0x1a5a5)
+	lui	$4,%hi(small_external_common+0x1a5a5)
+	addiu	$4,%lo(small_external_common+0x1a5a5)
+	lui	$4,%hi(big_local_common+0x1a5a5)
+	addiu	$4,%lo(big_local_common+0x1a5a5)
+	lui	$4,%hi(small_local_common+0x1a5a5)
+	addiu	$4,%lo(small_local_common+0x1a5a5)
+	lui	$5,%hi(0)
+	lw	$4,%hi(0)($5)
+	lui	$5,%hi(data_label)
+	lw	$4,%hi(data_label)($5)
+	lui	$5,%hi(data_label2)
+	lw	$4,%hi(data_label2)($5)
+	lui	$5,%hi(big_external_data_label)
+	lw	$4,%lo(big_external_data_label)($5)
+	lui	$5,%hi(small_external_data_label)
+	lw	$4,%lo(small_external_data_label)($5)
+	lui	$5,%hi(big_external_common)
+	lw	$4,%lo(big_external_common)($5)
+	lui	$5,%hi(small_external_common)
+	lw	$4,%lo(small_external_common)($5)
+	lui	$5,%hi(big_local_common)
+	lw	$4,%lo(big_local_common)($5)
+	lui	$5,%hi(small_local_common)
+	lw	$4,%lo(small_local_common)($5)
+	lui	$5,%hi(1)
+	lw	$4,%lo(1)($5)
+	lui	$5,%hi(data_label+1)
+	lw	$4,%lo(data_label+1)($5)
+	lui	$5,%hi(data_label2+1)
+	lw	$4,%lo(data_label2+1)($5)
+	lui	$5,%hi(big_external_data_label+1)
+	lw	$4,%lo(big_external_data_label+1)($5)
+	lui	$5,%hi(small_external_data_label+1)
+	lw	$4,%lo(small_external_data_label+1)($5)
+	lui	$5,%hi(big_external_common+1)
+	lw	$4,%lo(big_external_common+1)($5)
+	lui	$5,%hi(small_external_common+1)
+	lw	$4,%lo(small_external_common+1)($5)
+	lui	$5,%hi(big_local_common+1)
+	lw	$4,%lo(big_local_common+1)($5)
+	lui	$5,%hi(small_local_common+1)
+	lw	$4,%lo(small_local_common+1)($5)
+	lui	$5,%hi(0x8000)
+	lw	$4,%lo(0x8000)($5)
+	lui	$5,%hi(data_label+0x8000)
+	lw	$4,%lo(data_label+0x8000)($5)
+	lui	$5,%hi(data_label2+0x8000)
+	lw	$4,%lo(data_label2+0x8000)($5)
+	lui	$5,%hi(big_external_data_label+0x8000)
+	lw	$4,%lo(big_external_data_label+0x8000)($5)
+	lui	$5,%hi(small_external_data_label+0x8000)
+	lw	$4,%lo(small_external_data_label+0x8000)($5)
+	lui	$5,%hi(big_external_common+0x8000)
+	lw	$4,%lo(big_external_common+0x8000)($5)
+	lui	$5,%hi(small_external_common+0x8000)
+	lw	$4,%lo(small_external_common+0x8000)($5)
+	lui	$5,%hi(big_local_common+0x8000)
+	lw	$4,%lo(big_local_common+0x8000)($5)
+	lui	$5,%hi(small_local_common+0x8000)
+	lw	$4,%lo(small_local_common+0x8000)($5)
+	lui	$5,%hi(-0x8000)
+	lw	$4,%lo(-0x8000)($5)
+	lui	$5,%hi(data_label-0x8000)
+	lw	$4,%lo(data_label-0x8000)($5)
+	lui	$5,%hi(data_label2-0x8000)
+	lw	$4,%lo(data_label2-0x8000)($5)
+	lui	$5,%hi(big_external_data_label-0x8000)
+	lw	$4,%lo(big_external_data_label-0x8000)($5)
+	lui	$5,%hi(small_external_data_label-0x8000)
+	lw	$4,%lo(small_external_data_label-0x8000)($5)
+	lui	$5,%hi(big_external_common-0x8000)
+	lw	$4,%lo(big_external_common-0x8000)($5)
+	lui	$5,%hi(small_external_common-0x8000)
+	lw	$4,%lo(small_external_common-0x8000)($5)
+	lui	$5,%hi(big_local_common-0x8000)
+	lw	$4,%lo(big_local_common-0x8000)($5)
+	lui	$5,%hi(small_local_common-0x8000)
+	lw	$4,%lo(small_local_common-0x8000)($5)
+	lui	$5,%hi(0x10000)
+	lw	$4,%lo(0x10000)($5)
+	lui	$5,%hi(data_label+0x10000)
+	lw	$4,%lo(data_label+0x10000)($5)
+	lui	$5,%hi(data_label2+0x10000)
+	lw	$4,%lo(data_label2+0x10000)($5)
+	lui	$5,%hi(big_external_data_label+0x10000)
+	lw	$4,%lo(big_external_data_label+0x10000)($5)
+	lui	$5,%hi(small_external_data_label+0x10000)
+	lw	$4,%lo(small_external_data_label+0x10000)($5)
+	lui	$5,%hi(big_external_common+0x10000)
+	lw	$4,%lo(big_external_common+0x10000)($5)
+	lui	$5,%hi(small_external_common+0x10000)
+	lw	$4,%lo(small_external_common+0x10000)($5)
+	lui	$5,%hi(big_local_common+0x10000)
+	lw	$4,%lo(big_local_common+0x10000)($5)
+	lui	$5,%hi(small_local_common+0x10000)
+	lw	$4,%lo(small_local_common+0x10000)($5)
+	lui	$5,%hi(0x1a5a5)
+	lw	$4,%lo(0x1a5a5)($5)
+	lui	$5,%hi(data_label+0x1a5a5)
+	lw	$4,%lo(data_label+0x1a5a5)($5)
+	lui	$5,%hi(data_label2+0x1a5a5)
+	lw	$4,%lo(data_label2+0x1a5a5)($5)
+	lui	$5,%hi(big_external_data_label+0x1a5a5)
+	lw	$4,%lo(big_external_data_label+0x1a5a5)($5)
+	lui	$5,%hi(small_external_data_label+0x1a5a5)
+	lw	$4,%lo(small_external_data_label+0x1a5a5)($5)
+	lui	$5,%hi(big_external_common+0x1a5a5)
+	lw	$4,%lo(big_external_common+0x1a5a5)($5)
+	lui	$5,%hi(small_external_common+0x1a5a5)
+	lw	$4,%lo(small_external_common+0x1a5a5)($5)
+	lui	$5,%hi(big_local_common+0x1a5a5)
+	lw	$4,%lo(big_local_common+0x1a5a5)($5)
+	lui	$5,%hi(small_local_common+0x1a5a5)
+	lw	$4,%lo(small_local_common+0x1a5a5)($5)
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.space	16
+	.align	4, 0
diff --git a/gas/testsuite/gas/mips/mips16e2-imm-error.d b/gas/testsuite/gas/mips/mips16e2-imm-error.d
new file mode 100644
index 00000000000..7a0bfb4ddb4
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-imm-error.d
@@ -0,0 +1,4 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16e2 ASE immediates
+#as: -32 -mips32r2 -mmips16e2
+#error-output: mips16e2-imm-error.l
diff --git a/gas/testsuite/gas/mips/mips16e2-imm-error.l b/gas/testsuite/gas/mips/mips16e2-imm-error.l
new file mode 100644
index 00000000000..ff1638af4da
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-imm-error.l
@@ -0,0 +1,67 @@
+.*: Assembler messages:
+.*:3: Error: operand 2 out of range `lw \$2,-32769\(\$gp\)'
+.*:4: Error: operand 2 out of range `lw \$2,32768\(\$gp\)'
+.*:5: Error: operand 2 out of range `lh \$2,-32769\(\$gp\)'
+.*:6: Error: operand 2 out of range `lh \$2,32768\(\$gp\)'
+.*:7: Error: operand 2 out of range `lhu \$2,-32769\(\$gp\)'
+.*:8: Error: operand 2 out of range `lhu \$2,32768\(\$gp\)'
+.*:9: Error: operand 2 out of range `lb \$2,-32769\(\$gp\)'
+.*:10: Error: operand 2 out of range `lb \$2,32768\(\$gp\)'
+.*:11: Error: operand 2 out of range `lbu \$2,-32769\(\$gp\)'
+.*:12: Error: operand 2 out of range `lbu \$2,32768\(\$gp\)'
+.*:13: Error: operand 2 out of range `sw \$2,-32769\(\$gp\)'
+.*:14: Error: operand 2 out of range `sw \$2,32768\(\$gp\)'
+.*:15: Error: operand 2 out of range `sh \$2,-32769\(\$gp\)'
+.*:16: Error: operand 2 out of range `sh \$2,32768\(\$gp\)'
+.*:17: Error: operand 2 out of range `sb \$2,-32769\(\$gp\)'
+.*:18: Error: operand 2 out of range `sb \$2,32768\(\$gp\)'
+.*:20: Error: operand 2 out of range `ll \$2,-257\(\$gp\)'
+.*:21: Error: operand 2 out of range `ll \$2,256\(\$gp\)'
+.*:22: Error: operand 2 out of range `lwl \$2,-257\(\$gp\)'
+.*:23: Error: operand 2 out of range `lwl \$2,256\(\$gp\)'
+.*:24: Error: operand 2 out of range `lwr \$2,-257\(\$gp\)'
+.*:25: Error: operand 2 out of range `lwr \$2,256\(\$gp\)'
+.*:26: Error: operand 2 out of range `sc \$2,-257\(\$gp\)'
+.*:27: Error: operand 2 out of range `sc \$2,256\(\$gp\)'
+.*:28: Error: operand 2 out of range `swl \$2,-257\(\$gp\)'
+.*:29: Error: operand 2 out of range `swl \$2,256\(\$gp\)'
+.*:30: Error: operand 2 out of range `swr \$2,-257\(\$gp\)'
+.*:31: Error: operand 2 out of range `swr \$2,256\(\$gp\)'
+.*:33: Error: operand 2 out of range `cache 0,-257\(\$2\)'
+.*:34: Error: operand 2 out of range `cache 0,256\(\$2\)'
+.*:35: Error: operand 1 out of range `cache -1,0\(\$2\)'
+.*:36: Error: operand 1 out of range `cache 32,0\(\$2\)'
+.*:37: Error: operand 2 out of range `pref 0,-257\(\$2\)'
+.*:38: Error: operand 2 out of range `pref 0,256\(\$2\)'
+.*:39: Error: operand 1 out of range `pref -1,0\(\$2\)'
+.*:40: Error: operand 1 out of range `pref 32,0\(\$2\)'
+.*:42: Error: operand 3 out of range `addiu \$2,\$gp,-32769'
+.*:43: Error: operand 3 out of range `addiu \$2,\$gp,32768'
+.*:44: Error: operand 3 out of range `addu \$2,\$gp,-32769'
+.*:45: Error: operand 3 out of range `addu \$2,\$gp,32768'
+.*:47: Error: operand 2 out of range `lui \$2,-1'
+.*:48: Error: operand 2 out of range `lui \$2,65536'
+.*:49: Error: operand 2 out of range `andi \$2,-1'
+.*:50: Error: operand 2 out of range `andi \$2,65536'
+.*:51: Error: operand 2 out of range `ori \$2,-1'
+.*:52: Error: operand 2 out of range `ori \$2,65536'
+.*:53: Error: operand 2 out of range `xori \$2,-1'
+.*:54: Error: operand 2 out of range `xori \$2,65536'
+.*:56: Error: operand 4 out of range `ext \$2,\$3,0,0'
+.*:57: Error: operand 4 out of range `ext \$2,\$3,0,33'
+.*:58: Error: operand 3 out of range `ext \$2,\$3,-1,1'
+.*:59: Error: operand 3 out of range `ext \$2,\$3,32,1'
+.*:60: Error: operand 4 out of range `ins \$2,\$3,0,0'
+.*:61: Error: operand 4 out of range `ins \$2,\$3,0,33'
+.*:62: Error: operand 3 out of range `ins \$2,\$3,-1,1'
+.*:63: Error: operand 3 out of range `ins \$2,\$3,32,1'
+.*:64: Error: operand 4 out of range `ins \$2,\$0,0,0'
+.*:65: Error: operand 4 out of range `ins \$2,\$0,0,33'
+.*:66: Error: operand 3 out of range `ins \$2,\$0,-1,1'
+.*:67: Error: operand 3 out of range `ins \$2,\$0,32,1'
+.*:69: Error: operand 1 out of range `sync -1'
+.*:70: Error: operand 1 out of range `sync 32'
+.*:72: Error: operand 3 out of range `mfc0 \$2,\$3,-1'
+.*:73: Error: operand 3 out of range `mfc0 \$2,\$3,32'
+.*:74: Error: operand 3 out of range `mtc0 \$2,\$3,-1'
+.*:75: Error: operand 3 out of range `mtc0 \$2,\$3,32'
diff --git a/gas/testsuite/gas/mips/mips16e2-imm-error.s b/gas/testsuite/gas/mips/mips16e2-imm-error.s
new file mode 100644
index 00000000000..d993d8b1518
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-imm-error.s
@@ -0,0 +1,79 @@
+	.set	mips16
+foo:
+	lw	$2, -32769($gp)
+	lw	$2, 32768($gp)
+	lh	$2, -32769($gp)
+	lh	$2, 32768($gp)
+	lhu	$2, -32769($gp)
+	lhu	$2, 32768($gp)
+	lb	$2, -32769($gp)
+	lb	$2, 32768($gp)
+	lbu	$2, -32769($gp)
+	lbu	$2, 32768($gp)
+	sw	$2, -32769($gp)
+	sw	$2, 32768($gp)
+	sh	$2, -32769($gp)
+	sh	$2, 32768($gp)
+	sb	$2, -32769($gp)
+	sb	$2, 32768($gp)
+
+	ll	$2, -257($gp)
+	ll	$2, 256($gp)
+	lwl	$2, -257($gp)
+	lwl	$2, 256($gp)
+	lwr	$2, -257($gp)
+	lwr	$2, 256($gp)
+	sc	$2, -257($gp)
+	sc	$2, 256($gp)
+	swl	$2, -257($gp)
+	swl	$2, 256($gp)
+	swr	$2, -257($gp)
+	swr	$2, 256($gp)
+
+	cache	0, -257($2)
+	cache	0, 256($2)
+	cache	-1, 0($2)
+	cache	32, 0($2)
+	pref	0, -257($2)
+	pref	0, 256($2)
+	pref	-1, 0($2)
+	pref	32, 0($2)
+
+	addiu	$2, $gp, -32769
+	addiu	$2, $gp, 32768
+	addu	$2, $gp, -32769
+	addu	$2, $gp, 32768
+
+	lui	$2, -1
+	lui	$2, 65536
+	andi	$2, -1
+	andi	$2, 65536
+	ori	$2, -1
+	ori	$2, 65536
+	xori	$2, -1
+	xori	$2, 65536
+
+	ext	$2, $3, 0, 0
+	ext	$2, $3, 0, 33
+	ext	$2, $3, -1, 1
+	ext	$2, $3, 32, 1
+	ins	$2, $3, 0, 0
+	ins	$2, $3, 0, 33
+	ins	$2, $3, -1, 1
+	ins	$2, $3, 32, 1
+	ins	$2, $0, 0, 0
+	ins	$2, $0, 0, 33
+	ins	$2, $0, -1, 1
+	ins	$2, $0, 32, 1
+
+	sync	-1
+	sync	32
+
+	mfc0	$2, $3, -1
+	mfc0	$2, $3, 32
+	mtc0	$2, $3, -1
+	mtc0	$2, $3, 32
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.space	16
+	.align	4, 0
diff --git a/gas/testsuite/gas/mips/mips16e2-lui.d b/gas/testsuite/gas/mips/mips16e2-lui.d
new file mode 100644
index 00000000000..ee7e9f0d023
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-lui.d
@@ -0,0 +1,22 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16e2 LUI
+#as: -32 -mips16 -mips32r2 -mmips16e2
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> f000 6a20 	lui	v0,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	bar
+[0-9a-f]+ <[^>]*> f000 6b20 	lui	v1,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_HI16	.text
+[0-9a-f]+ <[^>]*> f770 6c25 	lui	a0,0x8765
+[0-9a-f]+ <[^>]*> f222 6d34 	lui	a1,0x1234
+[0-9a-f]+ <[^>]*> f000 6e20 	lui	a2,0x0
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	bar
+[0-9a-f]+ <[^>]*> f020 6f28 	lui	a3,0x28
+[ 	]*[0-9a-f]+: R_MIPS16_LO16	.text
+[0-9a-f]+ <[^>]*> f328 6821 	lui	s0,0x4321
+[0-9a-f]+ <[^>]*> f66a 6938 	lui	s1,0x5678
+[0-9a-f]+ <[^>]*> f222 6a34 	lui	v0,0x1234
+[0-9a-f]+ <[^>]*> f000 6b21 	lui	v1,0x1
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/mips16e2-lui.s b/gas/testsuite/gas/mips/mips16e2-lui.s
new file mode 100644
index 00000000000..d0715a776ff
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-lui.s
@@ -0,0 +1,18 @@
+	.text
+foo:
+	lui	$2, %hi(bar)
+	lui	$3, %hi(0f)
+	lui	$4, %hi(baz)
+	lui	$5, %hi(0x12345678)
+	lui	$6, %lo(bar)
+	lui	$7, %lo(0f)
+	lui	$16, %lo(baz)
+	lui	$17, %lo(0x12345678)
+	lui	$2, 0x1234
+	lui	$3, 1
+0:
+	.set	baz, 0x87654321
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.space	16
+	.align	4, 0
diff --git a/gas/testsuite/gas/mips/mips16e2-mt-sub.d b/gas/testsuite/gas/mips/mips16e2-mt-sub.d
new file mode 100644
index 00000000000..c19ebf94cb0
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-mt-sub.d
@@ -0,0 +1,33 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16e2 MT ASE subset disassembly
+#as: -32 -I$srcdir/$subdir
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> f0c0 3010 	sll	s0,3
+[0-9a-f]+ <[^>]*> f026      	extend	0x26
+[0-9a-f]+ <[^>]*> 6701      	move	s0,at
+[0-9a-f]+ <[^>]*> f026      	extend	0x26
+[0-9a-f]+ <[^>]*> 6701      	move	s0,at
+[0-9a-f]+ <[^>]*> f022      	extend	0x22
+[0-9a-f]+ <[^>]*> 6741      	move	v0,at
+[0-9a-f]+ <[^>]*> f027      	extend	0x27
+[0-9a-f]+ <[^>]*> 6701      	move	s0,at
+[0-9a-f]+ <[^>]*> f027      	extend	0x27
+[0-9a-f]+ <[^>]*> 6701      	move	s0,at
+[0-9a-f]+ <[^>]*> f023      	extend	0x23
+[0-9a-f]+ <[^>]*> 6741      	move	v0,at
+[0-9a-f]+ <[^>]*> f026      	extend	0x26
+[0-9a-f]+ <[^>]*> 6700      	move	s0,zero
+[0-9a-f]+ <[^>]*> f026      	extend	0x26
+[0-9a-f]+ <[^>]*> 6700      	move	s0,zero
+[0-9a-f]+ <[^>]*> f022      	extend	0x22
+[0-9a-f]+ <[^>]*> 6740      	move	v0,zero
+[0-9a-f]+ <[^>]*> f027      	extend	0x27
+[0-9a-f]+ <[^>]*> 6700      	move	s0,zero
+[0-9a-f]+ <[^>]*> f027      	extend	0x27
+[0-9a-f]+ <[^>]*> 6700      	move	s0,zero
+[0-9a-f]+ <[^>]*> f023      	extend	0x23
+[0-9a-f]+ <[^>]*> 6740      	move	v0,zero
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/mips16e2-mt-sub.s b/gas/testsuite/gas/mips/mips16e2-mt-sub.s
new file mode 100644
index 00000000000..990e06fa384
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-mt-sub.s
@@ -0,0 +1,4 @@
+	.set		mips64r2
+	.set		mips16e2
+	.set		mt
+	.include	"mips16e2-mt.s"
diff --git a/gas/testsuite/gas/mips/mips16e2-mt.d b/gas/testsuite/gas/mips/mips16e2-mt.d
new file mode 100644
index 00000000000..09876147808
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-mt.d
@@ -0,0 +1,21 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16e2 MT ASE instructions
+#as: -32 -mmt
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> f0c0 3010 	ehb
+[0-9a-f]+ <[^>]*> f026 6701 	dmt
+[0-9a-f]+ <[^>]*> f026 6701 	dmt
+[0-9a-f]+ <[^>]*> f022 6741 	dmt	v0
+[0-9a-f]+ <[^>]*> f027 6701 	emt
+[0-9a-f]+ <[^>]*> f027 6701 	emt
+[0-9a-f]+ <[^>]*> f023 6741 	emt	v0
+[0-9a-f]+ <[^>]*> f026 6700 	dvpe
+[0-9a-f]+ <[^>]*> f026 6700 	dvpe
+[0-9a-f]+ <[^>]*> f022 6740 	dvpe	v0
+[0-9a-f]+ <[^>]*> f027 6700 	evpe
+[0-9a-f]+ <[^>]*> f027 6700 	evpe
+[0-9a-f]+ <[^>]*> f023 6740 	evpe	v0
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/mips16e2-mt.s b/gas/testsuite/gas/mips/mips16e2-mt.s
new file mode 100644
index 00000000000..ea8032c06d1
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-mt.s
@@ -0,0 +1,21 @@
+	.set	mips16
+foo:
+	ehb
+
+	dmt
+	dmt	$0
+	dmt	$2
+	emt
+	emt	$0
+	emt	$2
+
+	dvpe
+	dvpe	$0
+	dvpe	$2
+	evpe
+	evpe	$0
+	evpe	$2
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.space	16
+	.align	4, 0
diff --git a/gas/testsuite/gas/mips/mips16e2-reloc-error.d b/gas/testsuite/gas/mips/mips16e2-reloc-error.d
new file mode 100644
index 00000000000..705fff2b946
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-reloc-error.d
@@ -0,0 +1,4 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16e2 relocation errors
+#as: -32 -mips64r2 -mmips16e2
+#error-output: mips16e2-reloc-error.l
diff --git a/gas/testsuite/gas/mips/mips16e2-reloc-error.l b/gas/testsuite/gas/mips/mips16e2-reloc-error.l
new file mode 100644
index 00000000000..5e23abde6f3
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-reloc-error.l
@@ -0,0 +1,18 @@
+.*: Assembler messages:
+.*:11: Error: operand 3 must be constant `ext \$3,\$2,%lo\(bar\),16'
+.*:12: Error: operand 4 must be constant `ext \$3,\$2,16,%lo\(bar\)'
+.*:13: Error: operand 3 must be constant `ins \$3,\$2,%lo\(bar\),16'
+.*:14: Error: operand 4 must be constant `ins \$3,\$2,16,%lo\(bar\)'
+.*:15: Error: operand 3 must be constant `ins \$2,\$0,%lo\(bar\),16'
+.*:16: Error: operand 4 must be constant `ins \$2,\$0,16,%lo\(bar\)'
+.*:18: Error: operand 1 must be constant `sync %lo\(bar\)'
+.*:20: Error: operand 2 must be constant `ll \$3,%lo\(bar\)\(\$2\)'
+.*:21: Error: operand 2 must be constant `lwl \$3,%lo\(bar\)\(\$2\)'
+.*:22: Error: operand 2 must be constant `lwr \$3,%lo\(bar\)\(\$2\)'
+.*:23: Error: operand 2 must be constant `sc \$3,%lo\(bar\)\(\$2\)'
+.*:24: Error: operand 2 must be constant `swl \$3,%lo\(bar\)\(\$2\)'
+.*:25: Error: operand 2 must be constant `swr \$3,%lo\(bar\)\(\$2\)'
+.*:27: Error: operand 2 must be constant `cache 3,%lo\(bar\)\(\$2\)'
+.*:28: Error: operand 2 must be constant `pref 3,%lo\(bar\)\(\$2\)'
+.*:30: Error: operand 3 must be constant `mfc0 \$3,\$2,%lo\(bar\)'
+.*:31: Error: operand 3 must be constant `mtc0 \$3,\$2,%lo\(bar\)'
diff --git a/gas/testsuite/gas/mips/mips16e2-reloc-error.s b/gas/testsuite/gas/mips/mips16e2-reloc-error.s
new file mode 100644
index 00000000000..17657c01bc4
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-reloc-error.s
@@ -0,0 +1,39 @@
+	.text
+
+	.set	bar, 4
+
+	.ent	foo
+	.set	mips16
+foo:
+	li	$2, %hi(bar)
+	sll	$2, $2, 16
+
+	ext	$3, $2, %lo(bar), 16
+	ext	$3, $2, 16, %lo(bar)
+	ins	$3, $2, %lo(bar), 16
+	ins	$3, $2, 16, %lo(bar)
+	ins	$2, $0, %lo(bar), 16
+	ins	$2, $0, 16, %lo(bar)
+
+	sync	%lo(bar)
+
+	ll	$3, %lo(bar)($2)
+	lwl	$3, %lo(bar)($2)
+	lwr	$3, %lo(bar)($2)
+	sc	$3, %lo(bar)($2)
+	swl	$3, %lo(bar)($2)
+	swr	$3, %lo(bar)($2)
+
+	cache	3, %lo(bar)($2)
+	pref	3, %lo(bar)($2)
+
+	mfc0	$3, $2, %lo(bar)
+	mtc0	$3, $2, %lo(bar)
+
+	nop
+	.set	nomips16
+	.end	foo
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.space	16
+	.align	4, 0
diff --git a/gas/testsuite/gas/mips/mips16e2-sub.d b/gas/testsuite/gas/mips/mips16e2-sub.d
new file mode 100644
index 00000000000..8ca9f8b509e
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-sub.d
@@ -0,0 +1,749 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16e2 ASE subset disassembly
+#as: -32 -I$srcdir/$subdir
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> f000 9220 	lw	v0,0\(sp\)
+[0-9a-f]+ <[^>]*> f000 9221 	lw	v0,1\(sp\)
+[0-9a-f]+ <[^>]*> f000 9222 	lw	v0,2\(sp\)
+[0-9a-f]+ <[^>]*> f000 9223 	lw	v0,3\(sp\)
+[0-9a-f]+ <[^>]*> f000 9224 	lw	v0,4\(sp\)
+[0-9a-f]+ <[^>]*> f000 9228 	lw	v0,8\(sp\)
+[0-9a-f]+ <[^>]*> f000 9230 	lw	v0,16\(sp\)
+[0-9a-f]+ <[^>]*> f020 9220 	lw	v0,32\(sp\)
+[0-9a-f]+ <[^>]*> f040 9220 	lw	v0,64\(sp\)
+[0-9a-f]+ <[^>]*> f080 9220 	lw	v0,128\(sp\)
+[0-9a-f]+ <[^>]*> f0e0 923f 	lw	v0,255\(sp\)
+[0-9a-f]+ <[^>]*> f100 9220 	lw	v0,256\(sp\)
+[0-9a-f]+ <[^>]*> f200 9220 	lw	v0,512\(sp\)
+[0-9a-f]+ <[^>]*> f400 9220 	lw	v0,1024\(sp\)
+[0-9a-f]+ <[^>]*> f001 9220 	lw	v0,2048\(sp\)
+[0-9a-f]+ <[^>]*> f002 9220 	lw	v0,4096\(sp\)
+[0-9a-f]+ <[^>]*> f004 9220 	lw	v0,8192\(sp\)
+[0-9a-f]+ <[^>]*> f008 9220 	lw	v0,16384\(sp\)
+[0-9a-f]+ <[^>]*> f7ef 923f 	lw	v0,32767\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 923f 	lw	v0,-1\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 923e 	lw	v0,-2\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 923d 	lw	v0,-3\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 923c 	lw	v0,-4\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 9238 	lw	v0,-8\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 9230 	lw	v0,-16\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 9220 	lw	v0,-32\(sp\)
+[0-9a-f]+ <[^>]*> f7df 9220 	lw	v0,-64\(sp\)
+[0-9a-f]+ <[^>]*> f79f 9220 	lw	v0,-128\(sp\)
+[0-9a-f]+ <[^>]*> f71f 9220 	lw	v0,-256\(sp\)
+[0-9a-f]+ <[^>]*> f61f 9220 	lw	v0,-512\(sp\)
+[0-9a-f]+ <[^>]*> f41f 9220 	lw	v0,-1024\(sp\)
+[0-9a-f]+ <[^>]*> f01f 9220 	lw	v0,-2048\(sp\)
+[0-9a-f]+ <[^>]*> f01e 9220 	lw	v0,-4096\(sp\)
+[0-9a-f]+ <[^>]*> f01c 9220 	lw	v0,-8192\(sp\)
+[0-9a-f]+ <[^>]*> f018 9220 	lw	v0,-16384\(sp\)
+[0-9a-f]+ <[^>]*> f010 9220 	lw	v0,-32768\(sp\)
+[0-9a-f]+ <[^>]*> f000 9240 	lw	v0,0\(sp\)
+[0-9a-f]+ <[^>]*> f000 9241 	lw	v0,1\(sp\)
+[0-9a-f]+ <[^>]*> f000 9242 	lw	v0,2\(sp\)
+[0-9a-f]+ <[^>]*> f000 9243 	lw	v0,3\(sp\)
+[0-9a-f]+ <[^>]*> f000 9244 	lw	v0,4\(sp\)
+[0-9a-f]+ <[^>]*> f000 9248 	lw	v0,8\(sp\)
+[0-9a-f]+ <[^>]*> f000 9250 	lw	v0,16\(sp\)
+[0-9a-f]+ <[^>]*> f020 9240 	lw	v0,32\(sp\)
+[0-9a-f]+ <[^>]*> f040 9240 	lw	v0,64\(sp\)
+[0-9a-f]+ <[^>]*> f080 9240 	lw	v0,128\(sp\)
+[0-9a-f]+ <[^>]*> f0e0 925f 	lw	v0,255\(sp\)
+[0-9a-f]+ <[^>]*> f100 9240 	lw	v0,256\(sp\)
+[0-9a-f]+ <[^>]*> f200 9240 	lw	v0,512\(sp\)
+[0-9a-f]+ <[^>]*> f400 9240 	lw	v0,1024\(sp\)
+[0-9a-f]+ <[^>]*> f001 9240 	lw	v0,2048\(sp\)
+[0-9a-f]+ <[^>]*> f002 9240 	lw	v0,4096\(sp\)
+[0-9a-f]+ <[^>]*> f004 9240 	lw	v0,8192\(sp\)
+[0-9a-f]+ <[^>]*> f008 9240 	lw	v0,16384\(sp\)
+[0-9a-f]+ <[^>]*> f7ef 925f 	lw	v0,32767\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 925f 	lw	v0,-1\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 925e 	lw	v0,-2\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 925d 	lw	v0,-3\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 925c 	lw	v0,-4\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 9258 	lw	v0,-8\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 9250 	lw	v0,-16\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 9240 	lw	v0,-32\(sp\)
+[0-9a-f]+ <[^>]*> f7df 9240 	lw	v0,-64\(sp\)
+[0-9a-f]+ <[^>]*> f79f 9240 	lw	v0,-128\(sp\)
+[0-9a-f]+ <[^>]*> f71f 9240 	lw	v0,-256\(sp\)
+[0-9a-f]+ <[^>]*> f61f 9240 	lw	v0,-512\(sp\)
+[0-9a-f]+ <[^>]*> f41f 9240 	lw	v0,-1024\(sp\)
+[0-9a-f]+ <[^>]*> f01f 9240 	lw	v0,-2048\(sp\)
+[0-9a-f]+ <[^>]*> f01e 9240 	lw	v0,-4096\(sp\)
+[0-9a-f]+ <[^>]*> f01c 9240 	lw	v0,-8192\(sp\)
+[0-9a-f]+ <[^>]*> f018 9240 	lw	v0,-16384\(sp\)
+[0-9a-f]+ <[^>]*> f010 9240 	lw	v0,-32768\(sp\)
+[0-9a-f]+ <[^>]*> f000 9280 	lw	v0,0\(sp\)
+[0-9a-f]+ <[^>]*> f000 9281 	lw	v0,1\(sp\)
+[0-9a-f]+ <[^>]*> f000 9282 	lw	v0,2\(sp\)
+[0-9a-f]+ <[^>]*> f000 9283 	lw	v0,3\(sp\)
+[0-9a-f]+ <[^>]*> f000 9284 	lw	v0,4\(sp\)
+[0-9a-f]+ <[^>]*> f000 9288 	lw	v0,8\(sp\)
+[0-9a-f]+ <[^>]*> f000 9290 	lw	v0,16\(sp\)
+[0-9a-f]+ <[^>]*> f020 9280 	lw	v0,32\(sp\)
+[0-9a-f]+ <[^>]*> f040 9280 	lw	v0,64\(sp\)
+[0-9a-f]+ <[^>]*> f080 9280 	lw	v0,128\(sp\)
+[0-9a-f]+ <[^>]*> f0e0 929f 	lw	v0,255\(sp\)
+[0-9a-f]+ <[^>]*> f100 9280 	lw	v0,256\(sp\)
+[0-9a-f]+ <[^>]*> f200 9280 	lw	v0,512\(sp\)
+[0-9a-f]+ <[^>]*> f400 9280 	lw	v0,1024\(sp\)
+[0-9a-f]+ <[^>]*> f001 9280 	lw	v0,2048\(sp\)
+[0-9a-f]+ <[^>]*> f002 9280 	lw	v0,4096\(sp\)
+[0-9a-f]+ <[^>]*> f004 9280 	lw	v0,8192\(sp\)
+[0-9a-f]+ <[^>]*> f008 9280 	lw	v0,16384\(sp\)
+[0-9a-f]+ <[^>]*> f7ef 929f 	lw	v0,32767\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 929f 	lw	v0,-1\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 929e 	lw	v0,-2\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 929d 	lw	v0,-3\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 929c 	lw	v0,-4\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 9298 	lw	v0,-8\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 9290 	lw	v0,-16\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 9280 	lw	v0,-32\(sp\)
+[0-9a-f]+ <[^>]*> f7df 9280 	lw	v0,-64\(sp\)
+[0-9a-f]+ <[^>]*> f79f 9280 	lw	v0,-128\(sp\)
+[0-9a-f]+ <[^>]*> f71f 9280 	lw	v0,-256\(sp\)
+[0-9a-f]+ <[^>]*> f61f 9280 	lw	v0,-512\(sp\)
+[0-9a-f]+ <[^>]*> f41f 9280 	lw	v0,-1024\(sp\)
+[0-9a-f]+ <[^>]*> f01f 9280 	lw	v0,-2048\(sp\)
+[0-9a-f]+ <[^>]*> f01e 9280 	lw	v0,-4096\(sp\)
+[0-9a-f]+ <[^>]*> f01c 9280 	lw	v0,-8192\(sp\)
+[0-9a-f]+ <[^>]*> f018 9280 	lw	v0,-16384\(sp\)
+[0-9a-f]+ <[^>]*> f010 9280 	lw	v0,-32768\(sp\)
+[0-9a-f]+ <[^>]*> f000 9260 	lw	v0,0\(sp\)
+[0-9a-f]+ <[^>]*> f000 9261 	lw	v0,1\(sp\)
+[0-9a-f]+ <[^>]*> f000 9262 	lw	v0,2\(sp\)
+[0-9a-f]+ <[^>]*> f000 9263 	lw	v0,3\(sp\)
+[0-9a-f]+ <[^>]*> f000 9264 	lw	v0,4\(sp\)
+[0-9a-f]+ <[^>]*> f000 9268 	lw	v0,8\(sp\)
+[0-9a-f]+ <[^>]*> f000 9270 	lw	v0,16\(sp\)
+[0-9a-f]+ <[^>]*> f020 9260 	lw	v0,32\(sp\)
+[0-9a-f]+ <[^>]*> f040 9260 	lw	v0,64\(sp\)
+[0-9a-f]+ <[^>]*> f080 9260 	lw	v0,128\(sp\)
+[0-9a-f]+ <[^>]*> f0e0 927f 	lw	v0,255\(sp\)
+[0-9a-f]+ <[^>]*> f100 9260 	lw	v0,256\(sp\)
+[0-9a-f]+ <[^>]*> f200 9260 	lw	v0,512\(sp\)
+[0-9a-f]+ <[^>]*> f400 9260 	lw	v0,1024\(sp\)
+[0-9a-f]+ <[^>]*> f001 9260 	lw	v0,2048\(sp\)
+[0-9a-f]+ <[^>]*> f002 9260 	lw	v0,4096\(sp\)
+[0-9a-f]+ <[^>]*> f004 9260 	lw	v0,8192\(sp\)
+[0-9a-f]+ <[^>]*> f008 9260 	lw	v0,16384\(sp\)
+[0-9a-f]+ <[^>]*> f7ef 927f 	lw	v0,32767\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 927f 	lw	v0,-1\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 927e 	lw	v0,-2\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 927d 	lw	v0,-3\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 927c 	lw	v0,-4\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 9278 	lw	v0,-8\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 9270 	lw	v0,-16\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 9260 	lw	v0,-32\(sp\)
+[0-9a-f]+ <[^>]*> f7df 9260 	lw	v0,-64\(sp\)
+[0-9a-f]+ <[^>]*> f79f 9260 	lw	v0,-128\(sp\)
+[0-9a-f]+ <[^>]*> f71f 9260 	lw	v0,-256\(sp\)
+[0-9a-f]+ <[^>]*> f61f 9260 	lw	v0,-512\(sp\)
+[0-9a-f]+ <[^>]*> f41f 9260 	lw	v0,-1024\(sp\)
+[0-9a-f]+ <[^>]*> f01f 9260 	lw	v0,-2048\(sp\)
+[0-9a-f]+ <[^>]*> f01e 9260 	lw	v0,-4096\(sp\)
+[0-9a-f]+ <[^>]*> f01c 9260 	lw	v0,-8192\(sp\)
+[0-9a-f]+ <[^>]*> f018 9260 	lw	v0,-16384\(sp\)
+[0-9a-f]+ <[^>]*> f010 9260 	lw	v0,-32768\(sp\)
+[0-9a-f]+ <[^>]*> f000 92a0 	lw	v0,0\(sp\)
+[0-9a-f]+ <[^>]*> f000 92a1 	lw	v0,1\(sp\)
+[0-9a-f]+ <[^>]*> f000 92a2 	lw	v0,2\(sp\)
+[0-9a-f]+ <[^>]*> f000 92a3 	lw	v0,3\(sp\)
+[0-9a-f]+ <[^>]*> f000 92a4 	lw	v0,4\(sp\)
+[0-9a-f]+ <[^>]*> f000 92a8 	lw	v0,8\(sp\)
+[0-9a-f]+ <[^>]*> f000 92b0 	lw	v0,16\(sp\)
+[0-9a-f]+ <[^>]*> f020 92a0 	lw	v0,32\(sp\)
+[0-9a-f]+ <[^>]*> f040 92a0 	lw	v0,64\(sp\)
+[0-9a-f]+ <[^>]*> f080 92a0 	lw	v0,128\(sp\)
+[0-9a-f]+ <[^>]*> f0e0 92bf 	lw	v0,255\(sp\)
+[0-9a-f]+ <[^>]*> f100 92a0 	lw	v0,256\(sp\)
+[0-9a-f]+ <[^>]*> f200 92a0 	lw	v0,512\(sp\)
+[0-9a-f]+ <[^>]*> f400 92a0 	lw	v0,1024\(sp\)
+[0-9a-f]+ <[^>]*> f001 92a0 	lw	v0,2048\(sp\)
+[0-9a-f]+ <[^>]*> f002 92a0 	lw	v0,4096\(sp\)
+[0-9a-f]+ <[^>]*> f004 92a0 	lw	v0,8192\(sp\)
+[0-9a-f]+ <[^>]*> f008 92a0 	lw	v0,16384\(sp\)
+[0-9a-f]+ <[^>]*> f7ef 92bf 	lw	v0,32767\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 92bf 	lw	v0,-1\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 92be 	lw	v0,-2\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 92bd 	lw	v0,-3\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 92bc 	lw	v0,-4\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 92b8 	lw	v0,-8\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 92b0 	lw	v0,-16\(sp\)
+[0-9a-f]+ <[^>]*> f7ff 92a0 	lw	v0,-32\(sp\)
+[0-9a-f]+ <[^>]*> f7df 92a0 	lw	v0,-64\(sp\)
+[0-9a-f]+ <[^>]*> f79f 92a0 	lw	v0,-128\(sp\)
+[0-9a-f]+ <[^>]*> f71f 92a0 	lw	v0,-256\(sp\)
+[0-9a-f]+ <[^>]*> f61f 92a0 	lw	v0,-512\(sp\)
+[0-9a-f]+ <[^>]*> f41f 92a0 	lw	v0,-1024\(sp\)
+[0-9a-f]+ <[^>]*> f01f 92a0 	lw	v0,-2048\(sp\)
+[0-9a-f]+ <[^>]*> f01e 92a0 	lw	v0,-4096\(sp\)
+[0-9a-f]+ <[^>]*> f01c 92a0 	lw	v0,-8192\(sp\)
+[0-9a-f]+ <[^>]*> f018 92a0 	lw	v0,-16384\(sp\)
+[0-9a-f]+ <[^>]*> f010 92a0 	lw	v0,-32768\(sp\)
+[0-9a-f]+ <[^>]*> f000 d220 	sw	v0,0\(sp\)
+[0-9a-f]+ <[^>]*> f000 d221 	sw	v0,1\(sp\)
+[0-9a-f]+ <[^>]*> f000 d222 	sw	v0,2\(sp\)
+[0-9a-f]+ <[^>]*> f000 d223 	sw	v0,3\(sp\)
+[0-9a-f]+ <[^>]*> f000 d224 	sw	v0,4\(sp\)
+[0-9a-f]+ <[^>]*> f000 d228 	sw	v0,8\(sp\)
+[0-9a-f]+ <[^>]*> f000 d230 	sw	v0,16\(sp\)
+[0-9a-f]+ <[^>]*> f020 d220 	sw	v0,32\(sp\)
+[0-9a-f]+ <[^>]*> f040 d220 	sw	v0,64\(sp\)
+[0-9a-f]+ <[^>]*> f080 d220 	sw	v0,128\(sp\)
+[0-9a-f]+ <[^>]*> f0e0 d23f 	sw	v0,255\(sp\)
+[0-9a-f]+ <[^>]*> f100 d220 	sw	v0,256\(sp\)
+[0-9a-f]+ <[^>]*> f200 d220 	sw	v0,512\(sp\)
+[0-9a-f]+ <[^>]*> f400 d220 	sw	v0,1024\(sp\)
+[0-9a-f]+ <[^>]*> f001 d220 	sw	v0,2048\(sp\)
+[0-9a-f]+ <[^>]*> f002 d220 	sw	v0,4096\(sp\)
+[0-9a-f]+ <[^>]*> f004 d220 	sw	v0,8192\(sp\)
+[0-9a-f]+ <[^>]*> f008 d220 	sw	v0,16384\(sp\)
+[0-9a-f]+ <[^>]*> f7ef d23f 	sw	v0,32767\(sp\)
+[0-9a-f]+ <[^>]*> f7ff d23f 	sw	v0,-1\(sp\)
+[0-9a-f]+ <[^>]*> f7ff d23e 	sw	v0,-2\(sp\)
+[0-9a-f]+ <[^>]*> f7ff d23d 	sw	v0,-3\(sp\)
+[0-9a-f]+ <[^>]*> f7ff d23c 	sw	v0,-4\(sp\)
+[0-9a-f]+ <[^>]*> f7ff d238 	sw	v0,-8\(sp\)
+[0-9a-f]+ <[^>]*> f7ff d230 	sw	v0,-16\(sp\)
+[0-9a-f]+ <[^>]*> f7ff d220 	sw	v0,-32\(sp\)
+[0-9a-f]+ <[^>]*> f7df d220 	sw	v0,-64\(sp\)
+[0-9a-f]+ <[^>]*> f79f d220 	sw	v0,-128\(sp\)
+[0-9a-f]+ <[^>]*> f71f d220 	sw	v0,-256\(sp\)
+[0-9a-f]+ <[^>]*> f61f d220 	sw	v0,-512\(sp\)
+[0-9a-f]+ <[^>]*> f41f d220 	sw	v0,-1024\(sp\)
+[0-9a-f]+ <[^>]*> f01f d220 	sw	v0,-2048\(sp\)
+[0-9a-f]+ <[^>]*> f01e d220 	sw	v0,-4096\(sp\)
+[0-9a-f]+ <[^>]*> f01c d220 	sw	v0,-8192\(sp\)
+[0-9a-f]+ <[^>]*> f018 d220 	sw	v0,-16384\(sp\)
+[0-9a-f]+ <[^>]*> f010 d220 	sw	v0,-32768\(sp\)
+[0-9a-f]+ <[^>]*> f000 d240 	sw	v0,0\(sp\)
+[0-9a-f]+ <[^>]*> f000 d241 	sw	v0,1\(sp\)
+[0-9a-f]+ <[^>]*> f000 d242 	sw	v0,2\(sp\)
+[0-9a-f]+ <[^>]*> f000 d243 	sw	v0,3\(sp\)
+[0-9a-f]+ <[^>]*> f000 d244 	sw	v0,4\(sp\)
+[0-9a-f]+ <[^>]*> f000 d248 	sw	v0,8\(sp\)
+[0-9a-f]+ <[^>]*> f000 d250 	sw	v0,16\(sp\)
+[0-9a-f]+ <[^>]*> f020 d240 	sw	v0,32\(sp\)
+[0-9a-f]+ <[^>]*> f040 d240 	sw	v0,64\(sp\)
+[0-9a-f]+ <[^>]*> f080 d240 	sw	v0,128\(sp\)
+[0-9a-f]+ <[^>]*> f0e0 d25f 	sw	v0,255\(sp\)
+[0-9a-f]+ <[^>]*> f100 d240 	sw	v0,256\(sp\)
+[0-9a-f]+ <[^>]*> f200 d240 	sw	v0,512\(sp\)
+[0-9a-f]+ <[^>]*> f400 d240 	sw	v0,1024\(sp\)
+[0-9a-f]+ <[^>]*> f001 d240 	sw	v0,2048\(sp\)
+[0-9a-f]+ <[^>]*> f002 d240 	sw	v0,4096\(sp\)
+[0-9a-f]+ <[^>]*> f004 d240 	sw	v0,8192\(sp\)
+[0-9a-f]+ <[^>]*> f008 d240 	sw	v0,16384\(sp\)
+[0-9a-f]+ <[^>]*> f7ef d25f 	sw	v0,32767\(sp\)
+[0-9a-f]+ <[^>]*> f7ff d25f 	sw	v0,-1\(sp\)
+[0-9a-f]+ <[^>]*> f7ff d25e 	sw	v0,-2\(sp\)
+[0-9a-f]+ <[^>]*> f7ff d25d 	sw	v0,-3\(sp\)
+[0-9a-f]+ <[^>]*> f7ff d25c 	sw	v0,-4\(sp\)
+[0-9a-f]+ <[^>]*> f7ff d258 	sw	v0,-8\(sp\)
+[0-9a-f]+ <[^>]*> f7ff d250 	sw	v0,-16\(sp\)
+[0-9a-f]+ <[^>]*> f7ff d240 	sw	v0,-32\(sp\)
+[0-9a-f]+ <[^>]*> f7df d240 	sw	v0,-64\(sp\)
+[0-9a-f]+ <[^>]*> f79f d240 	sw	v0,-128\(sp\)
+[0-9a-f]+ <[^>]*> f71f d240 	sw	v0,-256\(sp\)
+[0-9a-f]+ <[^>]*> f61f d240 	sw	v0,-512\(sp\)
+[0-9a-f]+ <[^>]*> f41f d240 	sw	v0,-1024\(sp\)
+[0-9a-f]+ <[^>]*> f01f d240 	sw	v0,-2048\(sp\)
+[0-9a-f]+ <[^>]*> f01e d240 	sw	v0,-4096\(sp\)
+[0-9a-f]+ <[^>]*> f01c d240 	sw	v0,-8192\(sp\)
+[0-9a-f]+ <[^>]*> f018 d240 	sw	v0,-16384\(sp\)
+[0-9a-f]+ <[^>]*> f010 d240 	sw	v0,-32768\(sp\)
+[0-9a-f]+ <[^>]*> f000 d260 	sw	v0,0\(sp\)
+[0-9a-f]+ <[^>]*> f000 d261 	sw	v0,1\(sp\)
+[0-9a-f]+ <[^>]*> f000 d262 	sw	v0,2\(sp\)
+[0-9a-f]+ <[^>]*> f000 d263 	sw	v0,3\(sp\)
+[0-9a-f]+ <[^>]*> f000 d264 	sw	v0,4\(sp\)
+[0-9a-f]+ <[^>]*> f000 d268 	sw	v0,8\(sp\)
+[0-9a-f]+ <[^>]*> f000 d270 	sw	v0,16\(sp\)
+[0-9a-f]+ <[^>]*> f020 d260 	sw	v0,32\(sp\)
+[0-9a-f]+ <[^>]*> f040 d260 	sw	v0,64\(sp\)
+[0-9a-f]+ <[^>]*> f080 d260 	sw	v0,128\(sp\)
+[0-9a-f]+ <[^>]*> f0e0 d27f 	sw	v0,255\(sp\)
+[0-9a-f]+ <[^>]*> f100 d260 	sw	v0,256\(sp\)
+[0-9a-f]+ <[^>]*> f200 d260 	sw	v0,512\(sp\)
+[0-9a-f]+ <[^>]*> f400 d260 	sw	v0,1024\(sp\)
+[0-9a-f]+ <[^>]*> f001 d260 	sw	v0,2048\(sp\)
+[0-9a-f]+ <[^>]*> f002 d260 	sw	v0,4096\(sp\)
+[0-9a-f]+ <[^>]*> f004 d260 	sw	v0,8192\(sp\)
+[0-9a-f]+ <[^>]*> f008 d260 	sw	v0,16384\(sp\)
+[0-9a-f]+ <[^>]*> f7ef d27f 	sw	v0,32767\(sp\)
+[0-9a-f]+ <[^>]*> f7ff d27f 	sw	v0,-1\(sp\)
+[0-9a-f]+ <[^>]*> f7ff d27e 	sw	v0,-2\(sp\)
+[0-9a-f]+ <[^>]*> f7ff d27d 	sw	v0,-3\(sp\)
+[0-9a-f]+ <[^>]*> f7ff d27c 	sw	v0,-4\(sp\)
+[0-9a-f]+ <[^>]*> f7ff d278 	sw	v0,-8\(sp\)
+[0-9a-f]+ <[^>]*> f7ff d270 	sw	v0,-16\(sp\)
+[0-9a-f]+ <[^>]*> f7ff d260 	sw	v0,-32\(sp\)
+[0-9a-f]+ <[^>]*> f7df d260 	sw	v0,-64\(sp\)
+[0-9a-f]+ <[^>]*> f79f d260 	sw	v0,-128\(sp\)
+[0-9a-f]+ <[^>]*> f71f d260 	sw	v0,-256\(sp\)
+[0-9a-f]+ <[^>]*> f61f d260 	sw	v0,-512\(sp\)
+[0-9a-f]+ <[^>]*> f41f d260 	sw	v0,-1024\(sp\)
+[0-9a-f]+ <[^>]*> f01f d260 	sw	v0,-2048\(sp\)
+[0-9a-f]+ <[^>]*> f01e d260 	sw	v0,-4096\(sp\)
+[0-9a-f]+ <[^>]*> f01c d260 	sw	v0,-8192\(sp\)
+[0-9a-f]+ <[^>]*> f018 d260 	sw	v0,-16384\(sp\)
+[0-9a-f]+ <[^>]*> f010 d260 	sw	v0,-32768\(sp\)
+[0-9a-f]+ <[^>]*> f003 92c0 	lw	v0,6144\(sp\)
+[0-9a-f]+ <[^>]*> f003 92c1 	lw	v0,6145\(sp\)
+[0-9a-f]+ <[^>]*> f003 92c2 	lw	v0,6146\(sp\)
+[0-9a-f]+ <[^>]*> f003 92c3 	lw	v0,6147\(sp\)
+[0-9a-f]+ <[^>]*> f003 92c4 	lw	v0,6148\(sp\)
+[0-9a-f]+ <[^>]*> f003 92c8 	lw	v0,6152\(sp\)
+[0-9a-f]+ <[^>]*> f003 92d0 	lw	v0,6160\(sp\)
+[0-9a-f]+ <[^>]*> f023 92c0 	lw	v0,6176\(sp\)
+[0-9a-f]+ <[^>]*> f043 92c0 	lw	v0,6208\(sp\)
+[0-9a-f]+ <[^>]*> f083 92c0 	lw	v0,6272\(sp\)
+[0-9a-f]+ <[^>]*> f0e3 92df 	lw	v0,6399\(sp\)
+[0-9a-f]+ <[^>]*> f1e3 92df 	lw	v0,6655\(sp\)
+[0-9a-f]+ <[^>]*> f1e3 92de 	lw	v0,6654\(sp\)
+[0-9a-f]+ <[^>]*> f1e3 92dd 	lw	v0,6653\(sp\)
+[0-9a-f]+ <[^>]*> f1e3 92dc 	lw	v0,6652\(sp\)
+[0-9a-f]+ <[^>]*> f1e3 92d8 	lw	v0,6648\(sp\)
+[0-9a-f]+ <[^>]*> f1e3 92d0 	lw	v0,6640\(sp\)
+[0-9a-f]+ <[^>]*> f1e3 92c0 	lw	v0,6624\(sp\)
+[0-9a-f]+ <[^>]*> f1c3 92c0 	lw	v0,6592\(sp\)
+[0-9a-f]+ <[^>]*> f183 92c0 	lw	v0,6528\(sp\)
+[0-9a-f]+ <[^>]*> f103 92c0 	lw	v0,6400\(sp\)
+[0-9a-f]+ <[^>]*> f003 92e0 	lw	v0,6144\(sp\)
+[0-9a-f]+ <[^>]*> f003 92e1 	lw	v0,6145\(sp\)
+[0-9a-f]+ <[^>]*> f003 92e2 	lw	v0,6146\(sp\)
+[0-9a-f]+ <[^>]*> f003 92e3 	lw	v0,6147\(sp\)
+[0-9a-f]+ <[^>]*> f003 92e4 	lw	v0,6148\(sp\)
+[0-9a-f]+ <[^>]*> f003 92e8 	lw	v0,6152\(sp\)
+[0-9a-f]+ <[^>]*> f003 92f0 	lw	v0,6160\(sp\)
+[0-9a-f]+ <[^>]*> f023 92e0 	lw	v0,6176\(sp\)
+[0-9a-f]+ <[^>]*> f043 92e0 	lw	v0,6208\(sp\)
+[0-9a-f]+ <[^>]*> f083 92e0 	lw	v0,6272\(sp\)
+[0-9a-f]+ <[^>]*> f0e3 92ff 	lw	v0,6399\(sp\)
+[0-9a-f]+ <[^>]*> f1e3 92ff 	lw	v0,6655\(sp\)
+[0-9a-f]+ <[^>]*> f1e3 92fe 	lw	v0,6654\(sp\)
+[0-9a-f]+ <[^>]*> f1e3 92fd 	lw	v0,6653\(sp\)
+[0-9a-f]+ <[^>]*> f1e3 92fc 	lw	v0,6652\(sp\)
+[0-9a-f]+ <[^>]*> f1e3 92f8 	lw	v0,6648\(sp\)
+[0-9a-f]+ <[^>]*> f1e3 92f0 	lw	v0,6640\(sp\)
+[0-9a-f]+ <[^>]*> f1e3 92e0 	lw	v0,6624\(sp\)
+[0-9a-f]+ <[^>]*> f1c3 92e0 	lw	v0,6592\(sp\)
+[0-9a-f]+ <[^>]*> f183 92e0 	lw	v0,6528\(sp\)
+[0-9a-f]+ <[^>]*> f103 92e0 	lw	v0,6400\(sp\)
+[0-9a-f]+ <[^>]*> f013 92e0 	lw	v0,-26624\(sp\)
+[0-9a-f]+ <[^>]*> f013 92e1 	lw	v0,-26623\(sp\)
+[0-9a-f]+ <[^>]*> f013 92e2 	lw	v0,-26622\(sp\)
+[0-9a-f]+ <[^>]*> f013 92e3 	lw	v0,-26621\(sp\)
+[0-9a-f]+ <[^>]*> f013 92e4 	lw	v0,-26620\(sp\)
+[0-9a-f]+ <[^>]*> f013 92e8 	lw	v0,-26616\(sp\)
+[0-9a-f]+ <[^>]*> f013 92f0 	lw	v0,-26608\(sp\)
+[0-9a-f]+ <[^>]*> f033 92e0 	lw	v0,-26592\(sp\)
+[0-9a-f]+ <[^>]*> f053 92e0 	lw	v0,-26560\(sp\)
+[0-9a-f]+ <[^>]*> f093 92e0 	lw	v0,-26496\(sp\)
+[0-9a-f]+ <[^>]*> f0f3 92ff 	lw	v0,-26369\(sp\)
+[0-9a-f]+ <[^>]*> f1f3 92ff 	lw	v0,-26113\(sp\)
+[0-9a-f]+ <[^>]*> f1f3 92fe 	lw	v0,-26114\(sp\)
+[0-9a-f]+ <[^>]*> f1f3 92fd 	lw	v0,-26115\(sp\)
+[0-9a-f]+ <[^>]*> f1f3 92fc 	lw	v0,-26116\(sp\)
+[0-9a-f]+ <[^>]*> f1f3 92f8 	lw	v0,-26120\(sp\)
+[0-9a-f]+ <[^>]*> f1f3 92f0 	lw	v0,-26128\(sp\)
+[0-9a-f]+ <[^>]*> f1f3 92e0 	lw	v0,-26144\(sp\)
+[0-9a-f]+ <[^>]*> f1d3 92e0 	lw	v0,-26176\(sp\)
+[0-9a-f]+ <[^>]*> f193 92e0 	lw	v0,-26240\(sp\)
+[0-9a-f]+ <[^>]*> f113 92e0 	lw	v0,-26368\(sp\)
+[0-9a-f]+ <[^>]*> f003 d2c0 	sw	v0,6144\(sp\)
+[0-9a-f]+ <[^>]*> f003 d2c1 	sw	v0,6145\(sp\)
+[0-9a-f]+ <[^>]*> f003 d2c2 	sw	v0,6146\(sp\)
+[0-9a-f]+ <[^>]*> f003 d2c3 	sw	v0,6147\(sp\)
+[0-9a-f]+ <[^>]*> f003 d2c4 	sw	v0,6148\(sp\)
+[0-9a-f]+ <[^>]*> f003 d2c8 	sw	v0,6152\(sp\)
+[0-9a-f]+ <[^>]*> f003 d2d0 	sw	v0,6160\(sp\)
+[0-9a-f]+ <[^>]*> f023 d2c0 	sw	v0,6176\(sp\)
+[0-9a-f]+ <[^>]*> f043 d2c0 	sw	v0,6208\(sp\)
+[0-9a-f]+ <[^>]*> f083 d2c0 	sw	v0,6272\(sp\)
+[0-9a-f]+ <[^>]*> f0e3 d2df 	sw	v0,6399\(sp\)
+[0-9a-f]+ <[^>]*> f1e3 d2df 	sw	v0,6655\(sp\)
+[0-9a-f]+ <[^>]*> f1e3 d2de 	sw	v0,6654\(sp\)
+[0-9a-f]+ <[^>]*> f1e3 d2dd 	sw	v0,6653\(sp\)
+[0-9a-f]+ <[^>]*> f1e3 d2dc 	sw	v0,6652\(sp\)
+[0-9a-f]+ <[^>]*> f1e3 d2d8 	sw	v0,6648\(sp\)
+[0-9a-f]+ <[^>]*> f1e3 d2d0 	sw	v0,6640\(sp\)
+[0-9a-f]+ <[^>]*> f1e3 d2c0 	sw	v0,6624\(sp\)
+[0-9a-f]+ <[^>]*> f1c3 d2c0 	sw	v0,6592\(sp\)
+[0-9a-f]+ <[^>]*> f183 d2c0 	sw	v0,6528\(sp\)
+[0-9a-f]+ <[^>]*> f103 d2c0 	sw	v0,6400\(sp\)
+[0-9a-f]+ <[^>]*> f003 d2e0 	sw	v0,6144\(sp\)
+[0-9a-f]+ <[^>]*> f003 d2e1 	sw	v0,6145\(sp\)
+[0-9a-f]+ <[^>]*> f003 d2e2 	sw	v0,6146\(sp\)
+[0-9a-f]+ <[^>]*> f003 d2e3 	sw	v0,6147\(sp\)
+[0-9a-f]+ <[^>]*> f003 d2e4 	sw	v0,6148\(sp\)
+[0-9a-f]+ <[^>]*> f003 d2e8 	sw	v0,6152\(sp\)
+[0-9a-f]+ <[^>]*> f003 d2f0 	sw	v0,6160\(sp\)
+[0-9a-f]+ <[^>]*> f023 d2e0 	sw	v0,6176\(sp\)
+[0-9a-f]+ <[^>]*> f043 d2e0 	sw	v0,6208\(sp\)
+[0-9a-f]+ <[^>]*> f083 d2e0 	sw	v0,6272\(sp\)
+[0-9a-f]+ <[^>]*> f0e3 d2ff 	sw	v0,6399\(sp\)
+[0-9a-f]+ <[^>]*> f1e3 d2ff 	sw	v0,6655\(sp\)
+[0-9a-f]+ <[^>]*> f1e3 d2fe 	sw	v0,6654\(sp\)
+[0-9a-f]+ <[^>]*> f1e3 d2fd 	sw	v0,6653\(sp\)
+[0-9a-f]+ <[^>]*> f1e3 d2fc 	sw	v0,6652\(sp\)
+[0-9a-f]+ <[^>]*> f1e3 d2f8 	sw	v0,6648\(sp\)
+[0-9a-f]+ <[^>]*> f1e3 d2f0 	sw	v0,6640\(sp\)
+[0-9a-f]+ <[^>]*> f1e3 d2e0 	sw	v0,6624\(sp\)
+[0-9a-f]+ <[^>]*> f1c3 d2e0 	sw	v0,6592\(sp\)
+[0-9a-f]+ <[^>]*> f183 d2e0 	sw	v0,6528\(sp\)
+[0-9a-f]+ <[^>]*> f103 d2e0 	sw	v0,6400\(sp\)
+[0-9a-f]+ <[^>]*> f013 d2e0 	sw	v0,-26624\(sp\)
+[0-9a-f]+ <[^>]*> f013 d2e1 	sw	v0,-26623\(sp\)
+[0-9a-f]+ <[^>]*> f013 d2e2 	sw	v0,-26622\(sp\)
+[0-9a-f]+ <[^>]*> f013 d2e3 	sw	v0,-26621\(sp\)
+[0-9a-f]+ <[^>]*> f013 d2e4 	sw	v0,-26620\(sp\)
+[0-9a-f]+ <[^>]*> f013 d2e8 	sw	v0,-26616\(sp\)
+[0-9a-f]+ <[^>]*> f013 d2f0 	sw	v0,-26608\(sp\)
+[0-9a-f]+ <[^>]*> f033 d2e0 	sw	v0,-26592\(sp\)
+[0-9a-f]+ <[^>]*> f053 d2e0 	sw	v0,-26560\(sp\)
+[0-9a-f]+ <[^>]*> f093 d2e0 	sw	v0,-26496\(sp\)
+[0-9a-f]+ <[^>]*> f0f3 d2ff 	sw	v0,-26369\(sp\)
+[0-9a-f]+ <[^>]*> f1f3 d2ff 	sw	v0,-26113\(sp\)
+[0-9a-f]+ <[^>]*> f1f3 d2fe 	sw	v0,-26114\(sp\)
+[0-9a-f]+ <[^>]*> f1f3 d2fd 	sw	v0,-26115\(sp\)
+[0-9a-f]+ <[^>]*> f1f3 d2fc 	sw	v0,-26116\(sp\)
+[0-9a-f]+ <[^>]*> f1f3 d2f8 	sw	v0,-26120\(sp\)
+[0-9a-f]+ <[^>]*> f1f3 d2f0 	sw	v0,-26128\(sp\)
+[0-9a-f]+ <[^>]*> f1f3 d2e0 	sw	v0,-26144\(sp\)
+[0-9a-f]+ <[^>]*> f1d3 d2e0 	sw	v0,-26176\(sp\)
+[0-9a-f]+ <[^>]*> f193 d2e0 	sw	v0,-26240\(sp\)
+[0-9a-f]+ <[^>]*> f113 d2e0 	sw	v0,-26368\(sp\)
+[0-9a-f]+ <[^>]*> f002 d3a0 	sw	v1,4096\(sp\)
+[0-9a-f]+ <[^>]*> f002 d3a1 	sw	v1,4097\(sp\)
+[0-9a-f]+ <[^>]*> f002 d3a2 	sw	v1,4098\(sp\)
+[0-9a-f]+ <[^>]*> f002 d3a3 	sw	v1,4099\(sp\)
+[0-9a-f]+ <[^>]*> f002 d3a4 	sw	v1,4100\(sp\)
+[0-9a-f]+ <[^>]*> f002 d3a8 	sw	v1,4104\(sp\)
+[0-9a-f]+ <[^>]*> f002 d3b0 	sw	v1,4112\(sp\)
+[0-9a-f]+ <[^>]*> f022 d3a0 	sw	v1,4128\(sp\)
+[0-9a-f]+ <[^>]*> f042 d3a0 	sw	v1,4160\(sp\)
+[0-9a-f]+ <[^>]*> f082 d3a0 	sw	v1,4224\(sp\)
+[0-9a-f]+ <[^>]*> f0e2 d3bf 	sw	v1,4351\(sp\)
+[0-9a-f]+ <[^>]*> f1e2 d3bf 	sw	v1,4607\(sp\)
+[0-9a-f]+ <[^>]*> f1e2 d3be 	sw	v1,4606\(sp\)
+[0-9a-f]+ <[^>]*> f1e2 d3bd 	sw	v1,4605\(sp\)
+[0-9a-f]+ <[^>]*> f1e2 d3bc 	sw	v1,4604\(sp\)
+[0-9a-f]+ <[^>]*> f1e2 d3b8 	sw	v1,4600\(sp\)
+[0-9a-f]+ <[^>]*> f1e2 d3b0 	sw	v1,4592\(sp\)
+[0-9a-f]+ <[^>]*> f1e2 d3a0 	sw	v1,4576\(sp\)
+[0-9a-f]+ <[^>]*> f1c2 d3a0 	sw	v1,4544\(sp\)
+[0-9a-f]+ <[^>]*> f182 d3a0 	sw	v1,4480\(sp\)
+[0-9a-f]+ <[^>]*> f102 d3a0 	sw	v1,4352\(sp\)
+[0-9a-f]+ <[^>]*> f01d d3a0 	sw	v1,-6144\(sp\)
+[0-9a-f]+ <[^>]*> f01d d3a1 	sw	v1,-6143\(sp\)
+[0-9a-f]+ <[^>]*> f01d d3a2 	sw	v1,-6142\(sp\)
+[0-9a-f]+ <[^>]*> f01d d3a3 	sw	v1,-6141\(sp\)
+[0-9a-f]+ <[^>]*> f01d d3a4 	sw	v1,-6140\(sp\)
+[0-9a-f]+ <[^>]*> f01d d3a8 	sw	v1,-6136\(sp\)
+[0-9a-f]+ <[^>]*> f01d d3b0 	sw	v1,-6128\(sp\)
+[0-9a-f]+ <[^>]*> f03d d3a0 	sw	v1,-6112\(sp\)
+[0-9a-f]+ <[^>]*> f05d d3a0 	sw	v1,-6080\(sp\)
+[0-9a-f]+ <[^>]*> f09d d3a0 	sw	v1,-6016\(sp\)
+[0-9a-f]+ <[^>]*> f0fd d3bf 	sw	v1,-5889\(sp\)
+[0-9a-f]+ <[^>]*> f1fd d3bf 	sw	v1,-5633\(sp\)
+[0-9a-f]+ <[^>]*> f1fd d3be 	sw	v1,-5634\(sp\)
+[0-9a-f]+ <[^>]*> f1fd d3bd 	sw	v1,-5635\(sp\)
+[0-9a-f]+ <[^>]*> f1fd d3bc 	sw	v1,-5636\(sp\)
+[0-9a-f]+ <[^>]*> f1fd d3b8 	sw	v1,-5640\(sp\)
+[0-9a-f]+ <[^>]*> f1fd d3b0 	sw	v1,-5648\(sp\)
+[0-9a-f]+ <[^>]*> f1fd d3a0 	sw	v1,-5664\(sp\)
+[0-9a-f]+ <[^>]*> f1dd d3a0 	sw	v1,-5696\(sp\)
+[0-9a-f]+ <[^>]*> f19d d3a0 	sw	v1,-5760\(sp\)
+[0-9a-f]+ <[^>]*> f11d d3a0 	sw	v1,-5888\(sp\)
+[0-9a-f]+ <[^>]*> f008 d380 	sw	v1,16384\(sp\)
+[0-9a-f]+ <[^>]*> f008 d381 	sw	v1,16385\(sp\)
+[0-9a-f]+ <[^>]*> f008 d382 	sw	v1,16386\(sp\)
+[0-9a-f]+ <[^>]*> f008 d383 	sw	v1,16387\(sp\)
+[0-9a-f]+ <[^>]*> f008 d384 	sw	v1,16388\(sp\)
+[0-9a-f]+ <[^>]*> f008 d388 	sw	v1,16392\(sp\)
+[0-9a-f]+ <[^>]*> f008 d390 	sw	v1,16400\(sp\)
+[0-9a-f]+ <[^>]*> f028 d380 	sw	v1,16416\(sp\)
+[0-9a-f]+ <[^>]*> f048 d380 	sw	v1,16448\(sp\)
+[0-9a-f]+ <[^>]*> f088 d380 	sw	v1,16512\(sp\)
+[0-9a-f]+ <[^>]*> f0e8 d39f 	sw	v1,16639\(sp\)
+[0-9a-f]+ <[^>]*> f1e8 d39f 	sw	v1,16895\(sp\)
+[0-9a-f]+ <[^>]*> f1e8 d39e 	sw	v1,16894\(sp\)
+[0-9a-f]+ <[^>]*> f1e8 d39d 	sw	v1,16893\(sp\)
+[0-9a-f]+ <[^>]*> f1e8 d39c 	sw	v1,16892\(sp\)
+[0-9a-f]+ <[^>]*> f1e8 d398 	sw	v1,16888\(sp\)
+[0-9a-f]+ <[^>]*> f1e8 d390 	sw	v1,16880\(sp\)
+[0-9a-f]+ <[^>]*> f1e8 d380 	sw	v1,16864\(sp\)
+[0-9a-f]+ <[^>]*> f1c8 d380 	sw	v1,16832\(sp\)
+[0-9a-f]+ <[^>]*> f188 d380 	sw	v1,16768\(sp\)
+[0-9a-f]+ <[^>]*> f108 d380 	sw	v1,16640\(sp\)
+[0-9a-f]+ <[^>]*> f017 d380 	sw	v1,-18432\(sp\)
+[0-9a-f]+ <[^>]*> f017 d381 	sw	v1,-18431\(sp\)
+[0-9a-f]+ <[^>]*> f017 d382 	sw	v1,-18430\(sp\)
+[0-9a-f]+ <[^>]*> f017 d383 	sw	v1,-18429\(sp\)
+[0-9a-f]+ <[^>]*> f017 d384 	sw	v1,-18428\(sp\)
+[0-9a-f]+ <[^>]*> f017 d388 	sw	v1,-18424\(sp\)
+[0-9a-f]+ <[^>]*> f017 d390 	sw	v1,-18416\(sp\)
+[0-9a-f]+ <[^>]*> f037 d380 	sw	v1,-18400\(sp\)
+[0-9a-f]+ <[^>]*> f057 d380 	sw	v1,-18368\(sp\)
+[0-9a-f]+ <[^>]*> f097 d380 	sw	v1,-18304\(sp\)
+[0-9a-f]+ <[^>]*> f0f7 d39f 	sw	v1,-18177\(sp\)
+[0-9a-f]+ <[^>]*> f1f7 d39f 	sw	v1,-17921\(sp\)
+[0-9a-f]+ <[^>]*> f1f7 d39e 	sw	v1,-17922\(sp\)
+[0-9a-f]+ <[^>]*> f1f7 d39d 	sw	v1,-17923\(sp\)
+[0-9a-f]+ <[^>]*> f1f7 d39c 	sw	v1,-17924\(sp\)
+[0-9a-f]+ <[^>]*> f1f7 d398 	sw	v1,-17928\(sp\)
+[0-9a-f]+ <[^>]*> f1f7 d390 	sw	v1,-17936\(sp\)
+[0-9a-f]+ <[^>]*> f1f7 d380 	sw	v1,-17952\(sp\)
+[0-9a-f]+ <[^>]*> f1d7 d380 	sw	v1,-17984\(sp\)
+[0-9a-f]+ <[^>]*> f197 d380 	sw	v1,-18048\(sp\)
+[0-9a-f]+ <[^>]*> f117 d380 	sw	v1,-18176\(sp\)
+[0-9a-f]+ <[^>]*> f000 0220 	addiu	v0,sp,0
+[0-9a-f]+ <[^>]*> f000 0221 	addiu	v0,sp,1
+[0-9a-f]+ <[^>]*> f000 0222 	addiu	v0,sp,2
+[0-9a-f]+ <[^>]*> f000 0224 	addiu	v0,sp,4
+[0-9a-f]+ <[^>]*> f000 0228 	addiu	v0,sp,8
+[0-9a-f]+ <[^>]*> f000 0230 	addiu	v0,sp,16
+[0-9a-f]+ <[^>]*> f020 0220 	addiu	v0,sp,32
+[0-9a-f]+ <[^>]*> f040 0220 	addiu	v0,sp,64
+[0-9a-f]+ <[^>]*> f080 0220 	addiu	v0,sp,128
+[0-9a-f]+ <[^>]*> f100 0220 	addiu	v0,sp,256
+[0-9a-f]+ <[^>]*> f200 0220 	addiu	v0,sp,512
+[0-9a-f]+ <[^>]*> f400 0220 	addiu	v0,sp,1024
+[0-9a-f]+ <[^>]*> f001 0220 	addiu	v0,sp,2048
+[0-9a-f]+ <[^>]*> f002 0220 	addiu	v0,sp,4096
+[0-9a-f]+ <[^>]*> f004 0220 	addiu	v0,sp,8192
+[0-9a-f]+ <[^>]*> f008 0220 	addiu	v0,sp,16384
+[0-9a-f]+ <[^>]*> f7ef 023f 	addiu	v0,sp,32767
+[0-9a-f]+ <[^>]*> f7ff 023f 	addiu	v0,sp,-1
+[0-9a-f]+ <[^>]*> f7ff 023e 	addiu	v0,sp,-2
+[0-9a-f]+ <[^>]*> f7ff 023c 	addiu	v0,sp,-4
+[0-9a-f]+ <[^>]*> f7ff 0238 	addiu	v0,sp,-8
+[0-9a-f]+ <[^>]*> f7ff 0230 	addiu	v0,sp,-16
+[0-9a-f]+ <[^>]*> f7ff 0220 	addiu	v0,sp,-32
+[0-9a-f]+ <[^>]*> f7df 0220 	addiu	v0,sp,-64
+[0-9a-f]+ <[^>]*> f79f 0220 	addiu	v0,sp,-128
+[0-9a-f]+ <[^>]*> f71f 0220 	addiu	v0,sp,-256
+[0-9a-f]+ <[^>]*> f61f 0220 	addiu	v0,sp,-512
+[0-9a-f]+ <[^>]*> f41f 0220 	addiu	v0,sp,-1024
+[0-9a-f]+ <[^>]*> f01f 0220 	addiu	v0,sp,-2048
+[0-9a-f]+ <[^>]*> f01e 0220 	addiu	v0,sp,-4096
+[0-9a-f]+ <[^>]*> f01c 0220 	addiu	v0,sp,-8192
+[0-9a-f]+ <[^>]*> f018 0220 	addiu	v0,sp,-16384
+[0-9a-f]+ <[^>]*> f010 0220 	addiu	v0,sp,-32768
+[0-9a-f]+ <[^>]*> f000 0220 	addiu	v0,sp,0
+[0-9a-f]+ <[^>]*> f000 0221 	addiu	v0,sp,1
+[0-9a-f]+ <[^>]*> f000 0222 	addiu	v0,sp,2
+[0-9a-f]+ <[^>]*> f000 0224 	addiu	v0,sp,4
+[0-9a-f]+ <[^>]*> f000 0228 	addiu	v0,sp,8
+[0-9a-f]+ <[^>]*> f000 0230 	addiu	v0,sp,16
+[0-9a-f]+ <[^>]*> f020 0220 	addiu	v0,sp,32
+[0-9a-f]+ <[^>]*> f040 0220 	addiu	v0,sp,64
+[0-9a-f]+ <[^>]*> f080 0220 	addiu	v0,sp,128
+[0-9a-f]+ <[^>]*> f100 0220 	addiu	v0,sp,256
+[0-9a-f]+ <[^>]*> f200 0220 	addiu	v0,sp,512
+[0-9a-f]+ <[^>]*> f400 0220 	addiu	v0,sp,1024
+[0-9a-f]+ <[^>]*> f001 0220 	addiu	v0,sp,2048
+[0-9a-f]+ <[^>]*> f002 0220 	addiu	v0,sp,4096
+[0-9a-f]+ <[^>]*> f004 0220 	addiu	v0,sp,8192
+[0-9a-f]+ <[^>]*> f008 0220 	addiu	v0,sp,16384
+[0-9a-f]+ <[^>]*> f7ef 023f 	addiu	v0,sp,32767
+[0-9a-f]+ <[^>]*> f7ff 023f 	addiu	v0,sp,-1
+[0-9a-f]+ <[^>]*> f7ff 023e 	addiu	v0,sp,-2
+[0-9a-f]+ <[^>]*> f7ff 023c 	addiu	v0,sp,-4
+[0-9a-f]+ <[^>]*> f7ff 0238 	addiu	v0,sp,-8
+[0-9a-f]+ <[^>]*> f7ff 0230 	addiu	v0,sp,-16
+[0-9a-f]+ <[^>]*> f7ff 0220 	addiu	v0,sp,-32
+[0-9a-f]+ <[^>]*> f7df 0220 	addiu	v0,sp,-64
+[0-9a-f]+ <[^>]*> f79f 0220 	addiu	v0,sp,-128
+[0-9a-f]+ <[^>]*> f71f 0220 	addiu	v0,sp,-256
+[0-9a-f]+ <[^>]*> f61f 0220 	addiu	v0,sp,-512
+[0-9a-f]+ <[^>]*> f41f 0220 	addiu	v0,sp,-1024
+[0-9a-f]+ <[^>]*> f01f 0220 	addiu	v0,sp,-2048
+[0-9a-f]+ <[^>]*> f01e 0220 	addiu	v0,sp,-4096
+[0-9a-f]+ <[^>]*> f01c 0220 	addiu	v0,sp,-8192
+[0-9a-f]+ <[^>]*> f018 0220 	addiu	v0,sp,-16384
+[0-9a-f]+ <[^>]*> f010 0220 	addiu	v0,sp,-32768
+[0-9a-f]+ <[^>]*> f000 6a20 	li	v0,0
+[0-9a-f]+ <[^>]*> f000 6a21 	li	v0,1
+[0-9a-f]+ <[^>]*> f000 6a22 	li	v0,2
+[0-9a-f]+ <[^>]*> f000 6a24 	li	v0,4
+[0-9a-f]+ <[^>]*> f000 6a28 	li	v0,8
+[0-9a-f]+ <[^>]*> f000 6a30 	li	v0,16
+[0-9a-f]+ <[^>]*> f020 6a20 	li	v0,32
+[0-9a-f]+ <[^>]*> f040 6a20 	li	v0,64
+[0-9a-f]+ <[^>]*> f080 6a20 	li	v0,128
+[0-9a-f]+ <[^>]*> f100 6a20 	li	v0,256
+[0-9a-f]+ <[^>]*> f200 6a20 	li	v0,512
+[0-9a-f]+ <[^>]*> f400 6a20 	li	v0,1024
+[0-9a-f]+ <[^>]*> f001 6a20 	li	v0,2048
+[0-9a-f]+ <[^>]*> f002 6a20 	li	v0,4096
+[0-9a-f]+ <[^>]*> f004 6a20 	li	v0,8192
+[0-9a-f]+ <[^>]*> f008 6a20 	li	v0,16384
+[0-9a-f]+ <[^>]*> f7ef 6a3f 	li	v0,32767
+[0-9a-f]+ <[^>]*> f010 6a20 	li	v0,32768
+[0-9a-f]+ <[^>]*> f7ff 6a3f 	li	v0,65535
+[0-9a-f]+ <[^>]*> f000 6a60 	li	v0,0
+[0-9a-f]+ <[^>]*> f000 6a61 	li	v0,1
+[0-9a-f]+ <[^>]*> f000 6a62 	li	v0,2
+[0-9a-f]+ <[^>]*> f000 6a64 	li	v0,4
+[0-9a-f]+ <[^>]*> f000 6a68 	li	v0,8
+[0-9a-f]+ <[^>]*> f000 6a70 	li	v0,16
+[0-9a-f]+ <[^>]*> f020 6a60 	li	v0,32
+[0-9a-f]+ <[^>]*> f040 6a60 	li	v0,64
+[0-9a-f]+ <[^>]*> f080 6a60 	li	v0,128
+[0-9a-f]+ <[^>]*> f100 6a60 	li	v0,256
+[0-9a-f]+ <[^>]*> f200 6a60 	li	v0,512
+[0-9a-f]+ <[^>]*> f400 6a60 	li	v0,1024
+[0-9a-f]+ <[^>]*> f001 6a60 	li	v0,2048
+[0-9a-f]+ <[^>]*> f002 6a60 	li	v0,4096
+[0-9a-f]+ <[^>]*> f004 6a60 	li	v0,8192
+[0-9a-f]+ <[^>]*> f008 6a60 	li	v0,16384
+[0-9a-f]+ <[^>]*> f7ef 6a7f 	li	v0,32767
+[0-9a-f]+ <[^>]*> f010 6a60 	li	v0,32768
+[0-9a-f]+ <[^>]*> f7ff 6a7f 	li	v0,65535
+[0-9a-f]+ <[^>]*> f000 6a40 	li	v0,0
+[0-9a-f]+ <[^>]*> f000 6a41 	li	v0,1
+[0-9a-f]+ <[^>]*> f000 6a42 	li	v0,2
+[0-9a-f]+ <[^>]*> f000 6a44 	li	v0,4
+[0-9a-f]+ <[^>]*> f000 6a48 	li	v0,8
+[0-9a-f]+ <[^>]*> f000 6a50 	li	v0,16
+[0-9a-f]+ <[^>]*> f020 6a40 	li	v0,32
+[0-9a-f]+ <[^>]*> f040 6a40 	li	v0,64
+[0-9a-f]+ <[^>]*> f080 6a40 	li	v0,128
+[0-9a-f]+ <[^>]*> f100 6a40 	li	v0,256
+[0-9a-f]+ <[^>]*> f200 6a40 	li	v0,512
+[0-9a-f]+ <[^>]*> f400 6a40 	li	v0,1024
+[0-9a-f]+ <[^>]*> f001 6a40 	li	v0,2048
+[0-9a-f]+ <[^>]*> f002 6a40 	li	v0,4096
+[0-9a-f]+ <[^>]*> f004 6a40 	li	v0,8192
+[0-9a-f]+ <[^>]*> f008 6a40 	li	v0,16384
+[0-9a-f]+ <[^>]*> f7ef 6a5f 	li	v0,32767
+[0-9a-f]+ <[^>]*> f010 6a40 	li	v0,32768
+[0-9a-f]+ <[^>]*> f7ff 6a5f 	li	v0,65535
+[0-9a-f]+ <[^>]*> f000 6a80 	li	v0,0
+[0-9a-f]+ <[^>]*> f000 6a81 	li	v0,1
+[0-9a-f]+ <[^>]*> f000 6a82 	li	v0,2
+[0-9a-f]+ <[^>]*> f000 6a84 	li	v0,4
+[0-9a-f]+ <[^>]*> f000 6a88 	li	v0,8
+[0-9a-f]+ <[^>]*> f000 6a90 	li	v0,16
+[0-9a-f]+ <[^>]*> f020 6a80 	li	v0,32
+[0-9a-f]+ <[^>]*> f040 6a80 	li	v0,64
+[0-9a-f]+ <[^>]*> f080 6a80 	li	v0,128
+[0-9a-f]+ <[^>]*> f100 6a80 	li	v0,256
+[0-9a-f]+ <[^>]*> f200 6a80 	li	v0,512
+[0-9a-f]+ <[^>]*> f400 6a80 	li	v0,1024
+[0-9a-f]+ <[^>]*> f001 6a80 	li	v0,2048
+[0-9a-f]+ <[^>]*> f002 6a80 	li	v0,4096
+[0-9a-f]+ <[^>]*> f004 6a80 	li	v0,8192
+[0-9a-f]+ <[^>]*> f008 6a80 	li	v0,16384
+[0-9a-f]+ <[^>]*> f7ef 6a9f 	li	v0,32767
+[0-9a-f]+ <[^>]*> f010 6a80 	li	v0,32768
+[0-9a-f]+ <[^>]*> f7ff 6a9f 	li	v0,65535
+[0-9a-f]+ <[^>]*> f03f 3348 	sll	v1,v0,0
+[0-9a-f]+ <[^>]*> f078 3348 	sll	v1,v0,1
+[0-9a-f]+ <[^>]*> f0b0 3348 	sll	v1,v0,2
+[0-9a-f]+ <[^>]*> f0ec 3348 	sll	v1,v0,3
+[0-9a-f]+ <[^>]*> f128 3348 	sll	v1,v0,4
+[0-9a-f]+ <[^>]*> f1a6 3348 	sll	v1,v0,6
+[0-9a-f]+ <[^>]*> f224 3348 	sll	v1,v0,8
+[0-9a-f]+ <[^>]*> f323 3348 	sll	v1,v0,12
+[0-9a-f]+ <[^>]*> f422 3348 	sll	v1,v0,16
+[0-9a-f]+ <[^>]*> f621 3348 	sll	v1,v0,24
+[0-9a-f]+ <[^>]*> f7e0 3348 	sll	v1,v0,31
+[0-9a-f]+ <[^>]*> f03f 3344 	sll	v1,v0,0
+[0-9a-f]+ <[^>]*> f079 3344 	sll	v1,v0,1
+[0-9a-f]+ <[^>]*> f0b2 3344 	sll	v1,v0,2
+[0-9a-f]+ <[^>]*> f0ef 3344 	sll	v1,v0,3
+[0-9a-f]+ <[^>]*> f12c 3344 	sll	v1,v0,4
+[0-9a-f]+ <[^>]*> f1ac 3344 	sll	v1,v0,6
+[0-9a-f]+ <[^>]*> f22c 3344 	sll	v1,v0,8
+[0-9a-f]+ <[^>]*> f32f 3344 	sll	v1,v0,12
+[0-9a-f]+ <[^>]*> f432 3344 	sll	v1,v0,16
+[0-9a-f]+ <[^>]*> f639 3344 	sll	v1,v0,24
+[0-9a-f]+ <[^>]*> f7ff 3344 	sll	v1,v0,31
+[0-9a-f]+ <[^>]*> f01f 30c4 	sll	s0,a2,0
+[0-9a-f]+ <[^>]*> f059 30c4 	sll	s0,a2,1
+[0-9a-f]+ <[^>]*> f092 30c4 	sll	s0,a2,2
+[0-9a-f]+ <[^>]*> f0cf 30c4 	sll	s0,a2,3
+[0-9a-f]+ <[^>]*> f10c 30c4 	sll	s0,a2,4
+[0-9a-f]+ <[^>]*> f18c 30c4 	sll	s0,a2,6
+[0-9a-f]+ <[^>]*> f20c 30c4 	sll	s0,a2,8
+[0-9a-f]+ <[^>]*> f30f 30c4 	sll	s0,a2,12
+[0-9a-f]+ <[^>]*> f412 30c4 	sll	s0,a2,16
+[0-9a-f]+ <[^>]*> f619 30c4 	sll	s0,a2,24
+[0-9a-f]+ <[^>]*> f7df 30c4 	sll	s0,a2,31
+[0-9a-f]+ <[^>]*> f023 328a 	srl	v0,a0,0
+[0-9a-f]+ <[^>]*> f025 344a 	srl	a0,v0,0
+[0-9a-f]+ <[^>]*> f026 372a 	srl	a3,s1,0
+[0-9a-f]+ <[^>]*> f000 328a 	srl	v0,a0,0
+[0-9a-f]+ <[^>]*> f023 3286 	srl	v0,a0,0
+[0-9a-f]+ <[^>]*> f025 3446 	srl	a0,v0,0
+[0-9a-f]+ <[^>]*> f026 31e6 	srl	s1,a3,0
+[0-9a-f]+ <[^>]*> f000 3286 	srl	v0,a0,0
+[0-9a-f]+ <[^>]*> f023 321a 	srl	v0,s0,0
+[0-9a-f]+ <[^>]*> f025 341a 	srl	a0,s0,0
+[0-9a-f]+ <[^>]*> f026 371a 	srl	a3,s0,0
+[0-9a-f]+ <[^>]*> f000 321a 	srl	v0,s0,0
+[0-9a-f]+ <[^>]*> f023 3216 	srl	v0,s0,0
+[0-9a-f]+ <[^>]*> f025 3416 	srl	a0,s0,0
+[0-9a-f]+ <[^>]*> f026 3116 	srl	s1,s0,0
+[0-9a-f]+ <[^>]*> f000 3216 	srl	v0,s0,0
+[0-9a-f]+ <[^>]*> f0c0 3010 	sll	s0,3
+[0-9a-f]+ <[^>]*> f140 3018 	sll	s0,5
+[0-9a-f]+ <[^>]*> f000 3014 	sll	s0,0
+[0-9a-f]+ <[^>]*> f040 3014 	sll	s0,1
+[0-9a-f]+ <[^>]*> f100 3014 	sll	s0,4
+[0-9a-f]+ <[^>]*> f340 3014 	sll	s0,13
+[0-9a-f]+ <[^>]*> f7c0 3014 	sll	s0,31
+[0-9a-f]+ <[^>]*> f100 3014 	sll	s0,4
+[0-9a-f]+ <[^>]*> f400 3014 	sll	s0,16
+[0-9a-f]+ <[^>]*> f440 3014 	sll	s0,17
+[0-9a-f]+ <[^>]*> f480 3014 	sll	s0,18
+[0-9a-f]+ <[^>]*> f4c0 3014 	sll	s0,19
+[0-9a-f]+ <[^>]*> f001 304c 	sll	s0,v0,0
+[0-9a-f]+ <[^>]*> f005 306c 	sll	s0,v1,0
+[0-9a-f]+ <[^>]*> f01d 308c 	sll	s0,a0,0
+[0-9a-f]+ <[^>]*> f01f 30ac 	sll	s0,a1,0
+[0-9a-f]+ <[^>]*> f006      	extend	0x6
+[0-9a-f]+ <[^>]*> 670c      	move	s0,t4
+[0-9a-f]+ <[^>]*> f006      	extend	0x6
+[0-9a-f]+ <[^>]*> 670c      	move	s0,t4
+[0-9a-f]+ <[^>]*> f002      	extend	0x2
+[0-9a-f]+ <[^>]*> 674c      	move	v0,t4
+[0-9a-f]+ <[^>]*> f007      	extend	0x7
+[0-9a-f]+ <[^>]*> 670c      	move	s0,t4
+[0-9a-f]+ <[^>]*> f007      	extend	0x7
+[0-9a-f]+ <[^>]*> 670c      	move	s0,t4
+[0-9a-f]+ <[^>]*> f003      	extend	0x3
+[0-9a-f]+ <[^>]*> 674c      	move	v0,t4
+[0-9a-f]+ <[^>]*> f000      	extend	0x0
+[0-9a-f]+ <[^>]*> 6765      	move	v1,a1
+[0-9a-f]+ <[^>]*> f000      	extend	0x0
+[0-9a-f]+ <[^>]*> 67a9      	move	a1,t1
+[0-9a-f]+ <[^>]*> f060      	extend	0x60
+[0-9a-f]+ <[^>]*> 67ed      	move	a3,t5
+[0-9a-f]+ <[^>]*> f020      	extend	0x20
+[0-9a-f]+ <[^>]*> 672f      	move	s1,t7
+[0-9a-f]+ <[^>]*> f0e0      	extend	0xe0
+[0-9a-f]+ <[^>]*> 6751      	move	v0,s1
+[0-9a-f]+ <[^>]*> f000      	extend	0x0
+[0-9a-f]+ <[^>]*> 67d5      	move	a2,s5
+[0-9a-f]+ <[^>]*> f001      	extend	0x1
+[0-9a-f]+ <[^>]*> 6765      	move	v1,a1
+[0-9a-f]+ <[^>]*> f001      	extend	0x1
+[0-9a-f]+ <[^>]*> 67a9      	move	a1,t1
+[0-9a-f]+ <[^>]*> f061      	extend	0x61
+[0-9a-f]+ <[^>]*> 67ed      	move	a3,t5
+[0-9a-f]+ <[^>]*> f021      	extend	0x21
+[0-9a-f]+ <[^>]*> 672f      	move	s1,t7
+[0-9a-f]+ <[^>]*> f0e1      	extend	0xe1
+[0-9a-f]+ <[^>]*> 6751      	move	v0,s1
+[0-9a-f]+ <[^>]*> f001      	extend	0x1
+[0-9a-f]+ <[^>]*> 67d5      	move	a2,s5
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/mips16e2-sub.s b/gas/testsuite/gas/mips/mips16e2-sub.s
new file mode 100644
index 00000000000..3d9be277b7f
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-sub.s
@@ -0,0 +1,3 @@
+	.set		mips64r2
+	.set		mips16e2
+	.include	"mips16e2.s"
diff --git a/gas/testsuite/gas/mips/mips16e2.d b/gas/testsuite/gas/mips/mips16e2.d
new file mode 100644
index 00000000000..862feb11cc9
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2.d
@@ -0,0 +1,731 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16e2 ASE instructions
+#as: -32
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> f000 9220 	lw	v0,0\(gp\)
+[0-9a-f]+ <[^>]*> f000 9221 	lw	v0,1\(gp\)
+[0-9a-f]+ <[^>]*> f000 9222 	lw	v0,2\(gp\)
+[0-9a-f]+ <[^>]*> f000 9223 	lw	v0,3\(gp\)
+[0-9a-f]+ <[^>]*> f000 9224 	lw	v0,4\(gp\)
+[0-9a-f]+ <[^>]*> f000 9228 	lw	v0,8\(gp\)
+[0-9a-f]+ <[^>]*> f000 9230 	lw	v0,16\(gp\)
+[0-9a-f]+ <[^>]*> f020 9220 	lw	v0,32\(gp\)
+[0-9a-f]+ <[^>]*> f040 9220 	lw	v0,64\(gp\)
+[0-9a-f]+ <[^>]*> f080 9220 	lw	v0,128\(gp\)
+[0-9a-f]+ <[^>]*> f0e0 923f 	lw	v0,255\(gp\)
+[0-9a-f]+ <[^>]*> f100 9220 	lw	v0,256\(gp\)
+[0-9a-f]+ <[^>]*> f200 9220 	lw	v0,512\(gp\)
+[0-9a-f]+ <[^>]*> f400 9220 	lw	v0,1024\(gp\)
+[0-9a-f]+ <[^>]*> f001 9220 	lw	v0,2048\(gp\)
+[0-9a-f]+ <[^>]*> f002 9220 	lw	v0,4096\(gp\)
+[0-9a-f]+ <[^>]*> f004 9220 	lw	v0,8192\(gp\)
+[0-9a-f]+ <[^>]*> f008 9220 	lw	v0,16384\(gp\)
+[0-9a-f]+ <[^>]*> f7ef 923f 	lw	v0,32767\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 923f 	lw	v0,-1\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 923e 	lw	v0,-2\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 923d 	lw	v0,-3\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 923c 	lw	v0,-4\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 9238 	lw	v0,-8\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 9230 	lw	v0,-16\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 9220 	lw	v0,-32\(gp\)
+[0-9a-f]+ <[^>]*> f7df 9220 	lw	v0,-64\(gp\)
+[0-9a-f]+ <[^>]*> f79f 9220 	lw	v0,-128\(gp\)
+[0-9a-f]+ <[^>]*> f71f 9220 	lw	v0,-256\(gp\)
+[0-9a-f]+ <[^>]*> f61f 9220 	lw	v0,-512\(gp\)
+[0-9a-f]+ <[^>]*> f41f 9220 	lw	v0,-1024\(gp\)
+[0-9a-f]+ <[^>]*> f01f 9220 	lw	v0,-2048\(gp\)
+[0-9a-f]+ <[^>]*> f01e 9220 	lw	v0,-4096\(gp\)
+[0-9a-f]+ <[^>]*> f01c 9220 	lw	v0,-8192\(gp\)
+[0-9a-f]+ <[^>]*> f018 9220 	lw	v0,-16384\(gp\)
+[0-9a-f]+ <[^>]*> f010 9220 	lw	v0,-32768\(gp\)
+[0-9a-f]+ <[^>]*> f000 9240 	lh	v0,0\(gp\)
+[0-9a-f]+ <[^>]*> f000 9241 	lh	v0,1\(gp\)
+[0-9a-f]+ <[^>]*> f000 9242 	lh	v0,2\(gp\)
+[0-9a-f]+ <[^>]*> f000 9243 	lh	v0,3\(gp\)
+[0-9a-f]+ <[^>]*> f000 9244 	lh	v0,4\(gp\)
+[0-9a-f]+ <[^>]*> f000 9248 	lh	v0,8\(gp\)
+[0-9a-f]+ <[^>]*> f000 9250 	lh	v0,16\(gp\)
+[0-9a-f]+ <[^>]*> f020 9240 	lh	v0,32\(gp\)
+[0-9a-f]+ <[^>]*> f040 9240 	lh	v0,64\(gp\)
+[0-9a-f]+ <[^>]*> f080 9240 	lh	v0,128\(gp\)
+[0-9a-f]+ <[^>]*> f0e0 925f 	lh	v0,255\(gp\)
+[0-9a-f]+ <[^>]*> f100 9240 	lh	v0,256\(gp\)
+[0-9a-f]+ <[^>]*> f200 9240 	lh	v0,512\(gp\)
+[0-9a-f]+ <[^>]*> f400 9240 	lh	v0,1024\(gp\)
+[0-9a-f]+ <[^>]*> f001 9240 	lh	v0,2048\(gp\)
+[0-9a-f]+ <[^>]*> f002 9240 	lh	v0,4096\(gp\)
+[0-9a-f]+ <[^>]*> f004 9240 	lh	v0,8192\(gp\)
+[0-9a-f]+ <[^>]*> f008 9240 	lh	v0,16384\(gp\)
+[0-9a-f]+ <[^>]*> f7ef 925f 	lh	v0,32767\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 925f 	lh	v0,-1\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 925e 	lh	v0,-2\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 925d 	lh	v0,-3\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 925c 	lh	v0,-4\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 9258 	lh	v0,-8\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 9250 	lh	v0,-16\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 9240 	lh	v0,-32\(gp\)
+[0-9a-f]+ <[^>]*> f7df 9240 	lh	v0,-64\(gp\)
+[0-9a-f]+ <[^>]*> f79f 9240 	lh	v0,-128\(gp\)
+[0-9a-f]+ <[^>]*> f71f 9240 	lh	v0,-256\(gp\)
+[0-9a-f]+ <[^>]*> f61f 9240 	lh	v0,-512\(gp\)
+[0-9a-f]+ <[^>]*> f41f 9240 	lh	v0,-1024\(gp\)
+[0-9a-f]+ <[^>]*> f01f 9240 	lh	v0,-2048\(gp\)
+[0-9a-f]+ <[^>]*> f01e 9240 	lh	v0,-4096\(gp\)
+[0-9a-f]+ <[^>]*> f01c 9240 	lh	v0,-8192\(gp\)
+[0-9a-f]+ <[^>]*> f018 9240 	lh	v0,-16384\(gp\)
+[0-9a-f]+ <[^>]*> f010 9240 	lh	v0,-32768\(gp\)
+[0-9a-f]+ <[^>]*> f000 9280 	lhu	v0,0\(gp\)
+[0-9a-f]+ <[^>]*> f000 9281 	lhu	v0,1\(gp\)
+[0-9a-f]+ <[^>]*> f000 9282 	lhu	v0,2\(gp\)
+[0-9a-f]+ <[^>]*> f000 9283 	lhu	v0,3\(gp\)
+[0-9a-f]+ <[^>]*> f000 9284 	lhu	v0,4\(gp\)
+[0-9a-f]+ <[^>]*> f000 9288 	lhu	v0,8\(gp\)
+[0-9a-f]+ <[^>]*> f000 9290 	lhu	v0,16\(gp\)
+[0-9a-f]+ <[^>]*> f020 9280 	lhu	v0,32\(gp\)
+[0-9a-f]+ <[^>]*> f040 9280 	lhu	v0,64\(gp\)
+[0-9a-f]+ <[^>]*> f080 9280 	lhu	v0,128\(gp\)
+[0-9a-f]+ <[^>]*> f0e0 929f 	lhu	v0,255\(gp\)
+[0-9a-f]+ <[^>]*> f100 9280 	lhu	v0,256\(gp\)
+[0-9a-f]+ <[^>]*> f200 9280 	lhu	v0,512\(gp\)
+[0-9a-f]+ <[^>]*> f400 9280 	lhu	v0,1024\(gp\)
+[0-9a-f]+ <[^>]*> f001 9280 	lhu	v0,2048\(gp\)
+[0-9a-f]+ <[^>]*> f002 9280 	lhu	v0,4096\(gp\)
+[0-9a-f]+ <[^>]*> f004 9280 	lhu	v0,8192\(gp\)
+[0-9a-f]+ <[^>]*> f008 9280 	lhu	v0,16384\(gp\)
+[0-9a-f]+ <[^>]*> f7ef 929f 	lhu	v0,32767\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 929f 	lhu	v0,-1\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 929e 	lhu	v0,-2\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 929d 	lhu	v0,-3\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 929c 	lhu	v0,-4\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 9298 	lhu	v0,-8\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 9290 	lhu	v0,-16\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 9280 	lhu	v0,-32\(gp\)
+[0-9a-f]+ <[^>]*> f7df 9280 	lhu	v0,-64\(gp\)
+[0-9a-f]+ <[^>]*> f79f 9280 	lhu	v0,-128\(gp\)
+[0-9a-f]+ <[^>]*> f71f 9280 	lhu	v0,-256\(gp\)
+[0-9a-f]+ <[^>]*> f61f 9280 	lhu	v0,-512\(gp\)
+[0-9a-f]+ <[^>]*> f41f 9280 	lhu	v0,-1024\(gp\)
+[0-9a-f]+ <[^>]*> f01f 9280 	lhu	v0,-2048\(gp\)
+[0-9a-f]+ <[^>]*> f01e 9280 	lhu	v0,-4096\(gp\)
+[0-9a-f]+ <[^>]*> f01c 9280 	lhu	v0,-8192\(gp\)
+[0-9a-f]+ <[^>]*> f018 9280 	lhu	v0,-16384\(gp\)
+[0-9a-f]+ <[^>]*> f010 9280 	lhu	v0,-32768\(gp\)
+[0-9a-f]+ <[^>]*> f000 9260 	lb	v0,0\(gp\)
+[0-9a-f]+ <[^>]*> f000 9261 	lb	v0,1\(gp\)
+[0-9a-f]+ <[^>]*> f000 9262 	lb	v0,2\(gp\)
+[0-9a-f]+ <[^>]*> f000 9263 	lb	v0,3\(gp\)
+[0-9a-f]+ <[^>]*> f000 9264 	lb	v0,4\(gp\)
+[0-9a-f]+ <[^>]*> f000 9268 	lb	v0,8\(gp\)
+[0-9a-f]+ <[^>]*> f000 9270 	lb	v0,16\(gp\)
+[0-9a-f]+ <[^>]*> f020 9260 	lb	v0,32\(gp\)
+[0-9a-f]+ <[^>]*> f040 9260 	lb	v0,64\(gp\)
+[0-9a-f]+ <[^>]*> f080 9260 	lb	v0,128\(gp\)
+[0-9a-f]+ <[^>]*> f0e0 927f 	lb	v0,255\(gp\)
+[0-9a-f]+ <[^>]*> f100 9260 	lb	v0,256\(gp\)
+[0-9a-f]+ <[^>]*> f200 9260 	lb	v0,512\(gp\)
+[0-9a-f]+ <[^>]*> f400 9260 	lb	v0,1024\(gp\)
+[0-9a-f]+ <[^>]*> f001 9260 	lb	v0,2048\(gp\)
+[0-9a-f]+ <[^>]*> f002 9260 	lb	v0,4096\(gp\)
+[0-9a-f]+ <[^>]*> f004 9260 	lb	v0,8192\(gp\)
+[0-9a-f]+ <[^>]*> f008 9260 	lb	v0,16384\(gp\)
+[0-9a-f]+ <[^>]*> f7ef 927f 	lb	v0,32767\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 927f 	lb	v0,-1\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 927e 	lb	v0,-2\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 927d 	lb	v0,-3\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 927c 	lb	v0,-4\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 9278 	lb	v0,-8\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 9270 	lb	v0,-16\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 9260 	lb	v0,-32\(gp\)
+[0-9a-f]+ <[^>]*> f7df 9260 	lb	v0,-64\(gp\)
+[0-9a-f]+ <[^>]*> f79f 9260 	lb	v0,-128\(gp\)
+[0-9a-f]+ <[^>]*> f71f 9260 	lb	v0,-256\(gp\)
+[0-9a-f]+ <[^>]*> f61f 9260 	lb	v0,-512\(gp\)
+[0-9a-f]+ <[^>]*> f41f 9260 	lb	v0,-1024\(gp\)
+[0-9a-f]+ <[^>]*> f01f 9260 	lb	v0,-2048\(gp\)
+[0-9a-f]+ <[^>]*> f01e 9260 	lb	v0,-4096\(gp\)
+[0-9a-f]+ <[^>]*> f01c 9260 	lb	v0,-8192\(gp\)
+[0-9a-f]+ <[^>]*> f018 9260 	lb	v0,-16384\(gp\)
+[0-9a-f]+ <[^>]*> f010 9260 	lb	v0,-32768\(gp\)
+[0-9a-f]+ <[^>]*> f000 92a0 	lbu	v0,0\(gp\)
+[0-9a-f]+ <[^>]*> f000 92a1 	lbu	v0,1\(gp\)
+[0-9a-f]+ <[^>]*> f000 92a2 	lbu	v0,2\(gp\)
+[0-9a-f]+ <[^>]*> f000 92a3 	lbu	v0,3\(gp\)
+[0-9a-f]+ <[^>]*> f000 92a4 	lbu	v0,4\(gp\)
+[0-9a-f]+ <[^>]*> f000 92a8 	lbu	v0,8\(gp\)
+[0-9a-f]+ <[^>]*> f000 92b0 	lbu	v0,16\(gp\)
+[0-9a-f]+ <[^>]*> f020 92a0 	lbu	v0,32\(gp\)
+[0-9a-f]+ <[^>]*> f040 92a0 	lbu	v0,64\(gp\)
+[0-9a-f]+ <[^>]*> f080 92a0 	lbu	v0,128\(gp\)
+[0-9a-f]+ <[^>]*> f0e0 92bf 	lbu	v0,255\(gp\)
+[0-9a-f]+ <[^>]*> f100 92a0 	lbu	v0,256\(gp\)
+[0-9a-f]+ <[^>]*> f200 92a0 	lbu	v0,512\(gp\)
+[0-9a-f]+ <[^>]*> f400 92a0 	lbu	v0,1024\(gp\)
+[0-9a-f]+ <[^>]*> f001 92a0 	lbu	v0,2048\(gp\)
+[0-9a-f]+ <[^>]*> f002 92a0 	lbu	v0,4096\(gp\)
+[0-9a-f]+ <[^>]*> f004 92a0 	lbu	v0,8192\(gp\)
+[0-9a-f]+ <[^>]*> f008 92a0 	lbu	v0,16384\(gp\)
+[0-9a-f]+ <[^>]*> f7ef 92bf 	lbu	v0,32767\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 92bf 	lbu	v0,-1\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 92be 	lbu	v0,-2\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 92bd 	lbu	v0,-3\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 92bc 	lbu	v0,-4\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 92b8 	lbu	v0,-8\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 92b0 	lbu	v0,-16\(gp\)
+[0-9a-f]+ <[^>]*> f7ff 92a0 	lbu	v0,-32\(gp\)
+[0-9a-f]+ <[^>]*> f7df 92a0 	lbu	v0,-64\(gp\)
+[0-9a-f]+ <[^>]*> f79f 92a0 	lbu	v0,-128\(gp\)
+[0-9a-f]+ <[^>]*> f71f 92a0 	lbu	v0,-256\(gp\)
+[0-9a-f]+ <[^>]*> f61f 92a0 	lbu	v0,-512\(gp\)
+[0-9a-f]+ <[^>]*> f41f 92a0 	lbu	v0,-1024\(gp\)
+[0-9a-f]+ <[^>]*> f01f 92a0 	lbu	v0,-2048\(gp\)
+[0-9a-f]+ <[^>]*> f01e 92a0 	lbu	v0,-4096\(gp\)
+[0-9a-f]+ <[^>]*> f01c 92a0 	lbu	v0,-8192\(gp\)
+[0-9a-f]+ <[^>]*> f018 92a0 	lbu	v0,-16384\(gp\)
+[0-9a-f]+ <[^>]*> f010 92a0 	lbu	v0,-32768\(gp\)
+[0-9a-f]+ <[^>]*> f000 d220 	sw	v0,0\(gp\)
+[0-9a-f]+ <[^>]*> f000 d221 	sw	v0,1\(gp\)
+[0-9a-f]+ <[^>]*> f000 d222 	sw	v0,2\(gp\)
+[0-9a-f]+ <[^>]*> f000 d223 	sw	v0,3\(gp\)
+[0-9a-f]+ <[^>]*> f000 d224 	sw	v0,4\(gp\)
+[0-9a-f]+ <[^>]*> f000 d228 	sw	v0,8\(gp\)
+[0-9a-f]+ <[^>]*> f000 d230 	sw	v0,16\(gp\)
+[0-9a-f]+ <[^>]*> f020 d220 	sw	v0,32\(gp\)
+[0-9a-f]+ <[^>]*> f040 d220 	sw	v0,64\(gp\)
+[0-9a-f]+ <[^>]*> f080 d220 	sw	v0,128\(gp\)
+[0-9a-f]+ <[^>]*> f0e0 d23f 	sw	v0,255\(gp\)
+[0-9a-f]+ <[^>]*> f100 d220 	sw	v0,256\(gp\)
+[0-9a-f]+ <[^>]*> f200 d220 	sw	v0,512\(gp\)
+[0-9a-f]+ <[^>]*> f400 d220 	sw	v0,1024\(gp\)
+[0-9a-f]+ <[^>]*> f001 d220 	sw	v0,2048\(gp\)
+[0-9a-f]+ <[^>]*> f002 d220 	sw	v0,4096\(gp\)
+[0-9a-f]+ <[^>]*> f004 d220 	sw	v0,8192\(gp\)
+[0-9a-f]+ <[^>]*> f008 d220 	sw	v0,16384\(gp\)
+[0-9a-f]+ <[^>]*> f7ef d23f 	sw	v0,32767\(gp\)
+[0-9a-f]+ <[^>]*> f7ff d23f 	sw	v0,-1\(gp\)
+[0-9a-f]+ <[^>]*> f7ff d23e 	sw	v0,-2\(gp\)
+[0-9a-f]+ <[^>]*> f7ff d23d 	sw	v0,-3\(gp\)
+[0-9a-f]+ <[^>]*> f7ff d23c 	sw	v0,-4\(gp\)
+[0-9a-f]+ <[^>]*> f7ff d238 	sw	v0,-8\(gp\)
+[0-9a-f]+ <[^>]*> f7ff d230 	sw	v0,-16\(gp\)
+[0-9a-f]+ <[^>]*> f7ff d220 	sw	v0,-32\(gp\)
+[0-9a-f]+ <[^>]*> f7df d220 	sw	v0,-64\(gp\)
+[0-9a-f]+ <[^>]*> f79f d220 	sw	v0,-128\(gp\)
+[0-9a-f]+ <[^>]*> f71f d220 	sw	v0,-256\(gp\)
+[0-9a-f]+ <[^>]*> f61f d220 	sw	v0,-512\(gp\)
+[0-9a-f]+ <[^>]*> f41f d220 	sw	v0,-1024\(gp\)
+[0-9a-f]+ <[^>]*> f01f d220 	sw	v0,-2048\(gp\)
+[0-9a-f]+ <[^>]*> f01e d220 	sw	v0,-4096\(gp\)
+[0-9a-f]+ <[^>]*> f01c d220 	sw	v0,-8192\(gp\)
+[0-9a-f]+ <[^>]*> f018 d220 	sw	v0,-16384\(gp\)
+[0-9a-f]+ <[^>]*> f010 d220 	sw	v0,-32768\(gp\)
+[0-9a-f]+ <[^>]*> f000 d240 	sh	v0,0\(gp\)
+[0-9a-f]+ <[^>]*> f000 d241 	sh	v0,1\(gp\)
+[0-9a-f]+ <[^>]*> f000 d242 	sh	v0,2\(gp\)
+[0-9a-f]+ <[^>]*> f000 d243 	sh	v0,3\(gp\)
+[0-9a-f]+ <[^>]*> f000 d244 	sh	v0,4\(gp\)
+[0-9a-f]+ <[^>]*> f000 d248 	sh	v0,8\(gp\)
+[0-9a-f]+ <[^>]*> f000 d250 	sh	v0,16\(gp\)
+[0-9a-f]+ <[^>]*> f020 d240 	sh	v0,32\(gp\)
+[0-9a-f]+ <[^>]*> f040 d240 	sh	v0,64\(gp\)
+[0-9a-f]+ <[^>]*> f080 d240 	sh	v0,128\(gp\)
+[0-9a-f]+ <[^>]*> f0e0 d25f 	sh	v0,255\(gp\)
+[0-9a-f]+ <[^>]*> f100 d240 	sh	v0,256\(gp\)
+[0-9a-f]+ <[^>]*> f200 d240 	sh	v0,512\(gp\)
+[0-9a-f]+ <[^>]*> f400 d240 	sh	v0,1024\(gp\)
+[0-9a-f]+ <[^>]*> f001 d240 	sh	v0,2048\(gp\)
+[0-9a-f]+ <[^>]*> f002 d240 	sh	v0,4096\(gp\)
+[0-9a-f]+ <[^>]*> f004 d240 	sh	v0,8192\(gp\)
+[0-9a-f]+ <[^>]*> f008 d240 	sh	v0,16384\(gp\)
+[0-9a-f]+ <[^>]*> f7ef d25f 	sh	v0,32767\(gp\)
+[0-9a-f]+ <[^>]*> f7ff d25f 	sh	v0,-1\(gp\)
+[0-9a-f]+ <[^>]*> f7ff d25e 	sh	v0,-2\(gp\)
+[0-9a-f]+ <[^>]*> f7ff d25d 	sh	v0,-3\(gp\)
+[0-9a-f]+ <[^>]*> f7ff d25c 	sh	v0,-4\(gp\)
+[0-9a-f]+ <[^>]*> f7ff d258 	sh	v0,-8\(gp\)
+[0-9a-f]+ <[^>]*> f7ff d250 	sh	v0,-16\(gp\)
+[0-9a-f]+ <[^>]*> f7ff d240 	sh	v0,-32\(gp\)
+[0-9a-f]+ <[^>]*> f7df d240 	sh	v0,-64\(gp\)
+[0-9a-f]+ <[^>]*> f79f d240 	sh	v0,-128\(gp\)
+[0-9a-f]+ <[^>]*> f71f d240 	sh	v0,-256\(gp\)
+[0-9a-f]+ <[^>]*> f61f d240 	sh	v0,-512\(gp\)
+[0-9a-f]+ <[^>]*> f41f d240 	sh	v0,-1024\(gp\)
+[0-9a-f]+ <[^>]*> f01f d240 	sh	v0,-2048\(gp\)
+[0-9a-f]+ <[^>]*> f01e d240 	sh	v0,-4096\(gp\)
+[0-9a-f]+ <[^>]*> f01c d240 	sh	v0,-8192\(gp\)
+[0-9a-f]+ <[^>]*> f018 d240 	sh	v0,-16384\(gp\)
+[0-9a-f]+ <[^>]*> f010 d240 	sh	v0,-32768\(gp\)
+[0-9a-f]+ <[^>]*> f000 d260 	sb	v0,0\(gp\)
+[0-9a-f]+ <[^>]*> f000 d261 	sb	v0,1\(gp\)
+[0-9a-f]+ <[^>]*> f000 d262 	sb	v0,2\(gp\)
+[0-9a-f]+ <[^>]*> f000 d263 	sb	v0,3\(gp\)
+[0-9a-f]+ <[^>]*> f000 d264 	sb	v0,4\(gp\)
+[0-9a-f]+ <[^>]*> f000 d268 	sb	v0,8\(gp\)
+[0-9a-f]+ <[^>]*> f000 d270 	sb	v0,16\(gp\)
+[0-9a-f]+ <[^>]*> f020 d260 	sb	v0,32\(gp\)
+[0-9a-f]+ <[^>]*> f040 d260 	sb	v0,64\(gp\)
+[0-9a-f]+ <[^>]*> f080 d260 	sb	v0,128\(gp\)
+[0-9a-f]+ <[^>]*> f0e0 d27f 	sb	v0,255\(gp\)
+[0-9a-f]+ <[^>]*> f100 d260 	sb	v0,256\(gp\)
+[0-9a-f]+ <[^>]*> f200 d260 	sb	v0,512\(gp\)
+[0-9a-f]+ <[^>]*> f400 d260 	sb	v0,1024\(gp\)
+[0-9a-f]+ <[^>]*> f001 d260 	sb	v0,2048\(gp\)
+[0-9a-f]+ <[^>]*> f002 d260 	sb	v0,4096\(gp\)
+[0-9a-f]+ <[^>]*> f004 d260 	sb	v0,8192\(gp\)
+[0-9a-f]+ <[^>]*> f008 d260 	sb	v0,16384\(gp\)
+[0-9a-f]+ <[^>]*> f7ef d27f 	sb	v0,32767\(gp\)
+[0-9a-f]+ <[^>]*> f7ff d27f 	sb	v0,-1\(gp\)
+[0-9a-f]+ <[^>]*> f7ff d27e 	sb	v0,-2\(gp\)
+[0-9a-f]+ <[^>]*> f7ff d27d 	sb	v0,-3\(gp\)
+[0-9a-f]+ <[^>]*> f7ff d27c 	sb	v0,-4\(gp\)
+[0-9a-f]+ <[^>]*> f7ff d278 	sb	v0,-8\(gp\)
+[0-9a-f]+ <[^>]*> f7ff d270 	sb	v0,-16\(gp\)
+[0-9a-f]+ <[^>]*> f7ff d260 	sb	v0,-32\(gp\)
+[0-9a-f]+ <[^>]*> f7df d260 	sb	v0,-64\(gp\)
+[0-9a-f]+ <[^>]*> f79f d260 	sb	v0,-128\(gp\)
+[0-9a-f]+ <[^>]*> f71f d260 	sb	v0,-256\(gp\)
+[0-9a-f]+ <[^>]*> f61f d260 	sb	v0,-512\(gp\)
+[0-9a-f]+ <[^>]*> f41f d260 	sb	v0,-1024\(gp\)
+[0-9a-f]+ <[^>]*> f01f d260 	sb	v0,-2048\(gp\)
+[0-9a-f]+ <[^>]*> f01e d260 	sb	v0,-4096\(gp\)
+[0-9a-f]+ <[^>]*> f01c d260 	sb	v0,-8192\(gp\)
+[0-9a-f]+ <[^>]*> f018 d260 	sb	v0,-16384\(gp\)
+[0-9a-f]+ <[^>]*> f010 d260 	sb	v0,-32768\(gp\)
+[0-9a-f]+ <[^>]*> f003 92c0 	ll	v0,0\(v1\)
+[0-9a-f]+ <[^>]*> f003 92c1 	ll	v0,1\(v1\)
+[0-9a-f]+ <[^>]*> f003 92c2 	ll	v0,2\(v1\)
+[0-9a-f]+ <[^>]*> f003 92c3 	ll	v0,3\(v1\)
+[0-9a-f]+ <[^>]*> f003 92c4 	ll	v0,4\(v1\)
+[0-9a-f]+ <[^>]*> f003 92c8 	ll	v0,8\(v1\)
+[0-9a-f]+ <[^>]*> f003 92d0 	ll	v0,16\(v1\)
+[0-9a-f]+ <[^>]*> f023 92c0 	ll	v0,32\(v1\)
+[0-9a-f]+ <[^>]*> f043 92c0 	ll	v0,64\(v1\)
+[0-9a-f]+ <[^>]*> f083 92c0 	ll	v0,128\(v1\)
+[0-9a-f]+ <[^>]*> f0e3 92df 	ll	v0,255\(v1\)
+[0-9a-f]+ <[^>]*> f1e3 92df 	ll	v0,-1\(v1\)
+[0-9a-f]+ <[^>]*> f1e3 92de 	ll	v0,-2\(v1\)
+[0-9a-f]+ <[^>]*> f1e3 92dd 	ll	v0,-3\(v1\)
+[0-9a-f]+ <[^>]*> f1e3 92dc 	ll	v0,-4\(v1\)
+[0-9a-f]+ <[^>]*> f1e3 92d8 	ll	v0,-8\(v1\)
+[0-9a-f]+ <[^>]*> f1e3 92d0 	ll	v0,-16\(v1\)
+[0-9a-f]+ <[^>]*> f1e3 92c0 	ll	v0,-32\(v1\)
+[0-9a-f]+ <[^>]*> f1c3 92c0 	ll	v0,-64\(v1\)
+[0-9a-f]+ <[^>]*> f183 92c0 	ll	v0,-128\(v1\)
+[0-9a-f]+ <[^>]*> f103 92c0 	ll	v0,-256\(v1\)
+[0-9a-f]+ <[^>]*> f003 92e0 	lwl	v0,0\(v1\)
+[0-9a-f]+ <[^>]*> f003 92e1 	lwl	v0,1\(v1\)
+[0-9a-f]+ <[^>]*> f003 92e2 	lwl	v0,2\(v1\)
+[0-9a-f]+ <[^>]*> f003 92e3 	lwl	v0,3\(v1\)
+[0-9a-f]+ <[^>]*> f003 92e4 	lwl	v0,4\(v1\)
+[0-9a-f]+ <[^>]*> f003 92e8 	lwl	v0,8\(v1\)
+[0-9a-f]+ <[^>]*> f003 92f0 	lwl	v0,16\(v1\)
+[0-9a-f]+ <[^>]*> f023 92e0 	lwl	v0,32\(v1\)
+[0-9a-f]+ <[^>]*> f043 92e0 	lwl	v0,64\(v1\)
+[0-9a-f]+ <[^>]*> f083 92e0 	lwl	v0,128\(v1\)
+[0-9a-f]+ <[^>]*> f0e3 92ff 	lwl	v0,255\(v1\)
+[0-9a-f]+ <[^>]*> f1e3 92ff 	lwl	v0,-1\(v1\)
+[0-9a-f]+ <[^>]*> f1e3 92fe 	lwl	v0,-2\(v1\)
+[0-9a-f]+ <[^>]*> f1e3 92fd 	lwl	v0,-3\(v1\)
+[0-9a-f]+ <[^>]*> f1e3 92fc 	lwl	v0,-4\(v1\)
+[0-9a-f]+ <[^>]*> f1e3 92f8 	lwl	v0,-8\(v1\)
+[0-9a-f]+ <[^>]*> f1e3 92f0 	lwl	v0,-16\(v1\)
+[0-9a-f]+ <[^>]*> f1e3 92e0 	lwl	v0,-32\(v1\)
+[0-9a-f]+ <[^>]*> f1c3 92e0 	lwl	v0,-64\(v1\)
+[0-9a-f]+ <[^>]*> f183 92e0 	lwl	v0,-128\(v1\)
+[0-9a-f]+ <[^>]*> f103 92e0 	lwl	v0,-256\(v1\)
+[0-9a-f]+ <[^>]*> f013 92e0 	lwr	v0,0\(v1\)
+[0-9a-f]+ <[^>]*> f013 92e1 	lwr	v0,1\(v1\)
+[0-9a-f]+ <[^>]*> f013 92e2 	lwr	v0,2\(v1\)
+[0-9a-f]+ <[^>]*> f013 92e3 	lwr	v0,3\(v1\)
+[0-9a-f]+ <[^>]*> f013 92e4 	lwr	v0,4\(v1\)
+[0-9a-f]+ <[^>]*> f013 92e8 	lwr	v0,8\(v1\)
+[0-9a-f]+ <[^>]*> f013 92f0 	lwr	v0,16\(v1\)
+[0-9a-f]+ <[^>]*> f033 92e0 	lwr	v0,32\(v1\)
+[0-9a-f]+ <[^>]*> f053 92e0 	lwr	v0,64\(v1\)
+[0-9a-f]+ <[^>]*> f093 92e0 	lwr	v0,128\(v1\)
+[0-9a-f]+ <[^>]*> f0f3 92ff 	lwr	v0,255\(v1\)
+[0-9a-f]+ <[^>]*> f1f3 92ff 	lwr	v0,-1\(v1\)
+[0-9a-f]+ <[^>]*> f1f3 92fe 	lwr	v0,-2\(v1\)
+[0-9a-f]+ <[^>]*> f1f3 92fd 	lwr	v0,-3\(v1\)
+[0-9a-f]+ <[^>]*> f1f3 92fc 	lwr	v0,-4\(v1\)
+[0-9a-f]+ <[^>]*> f1f3 92f8 	lwr	v0,-8\(v1\)
+[0-9a-f]+ <[^>]*> f1f3 92f0 	lwr	v0,-16\(v1\)
+[0-9a-f]+ <[^>]*> f1f3 92e0 	lwr	v0,-32\(v1\)
+[0-9a-f]+ <[^>]*> f1d3 92e0 	lwr	v0,-64\(v1\)
+[0-9a-f]+ <[^>]*> f193 92e0 	lwr	v0,-128\(v1\)
+[0-9a-f]+ <[^>]*> f113 92e0 	lwr	v0,-256\(v1\)
+[0-9a-f]+ <[^>]*> f003 d2c0 	sc	v0,0\(v1\)
+[0-9a-f]+ <[^>]*> f003 d2c1 	sc	v0,1\(v1\)
+[0-9a-f]+ <[^>]*> f003 d2c2 	sc	v0,2\(v1\)
+[0-9a-f]+ <[^>]*> f003 d2c3 	sc	v0,3\(v1\)
+[0-9a-f]+ <[^>]*> f003 d2c4 	sc	v0,4\(v1\)
+[0-9a-f]+ <[^>]*> f003 d2c8 	sc	v0,8\(v1\)
+[0-9a-f]+ <[^>]*> f003 d2d0 	sc	v0,16\(v1\)
+[0-9a-f]+ <[^>]*> f023 d2c0 	sc	v0,32\(v1\)
+[0-9a-f]+ <[^>]*> f043 d2c0 	sc	v0,64\(v1\)
+[0-9a-f]+ <[^>]*> f083 d2c0 	sc	v0,128\(v1\)
+[0-9a-f]+ <[^>]*> f0e3 d2df 	sc	v0,255\(v1\)
+[0-9a-f]+ <[^>]*> f1e3 d2df 	sc	v0,-1\(v1\)
+[0-9a-f]+ <[^>]*> f1e3 d2de 	sc	v0,-2\(v1\)
+[0-9a-f]+ <[^>]*> f1e3 d2dd 	sc	v0,-3\(v1\)
+[0-9a-f]+ <[^>]*> f1e3 d2dc 	sc	v0,-4\(v1\)
+[0-9a-f]+ <[^>]*> f1e3 d2d8 	sc	v0,-8\(v1\)
+[0-9a-f]+ <[^>]*> f1e3 d2d0 	sc	v0,-16\(v1\)
+[0-9a-f]+ <[^>]*> f1e3 d2c0 	sc	v0,-32\(v1\)
+[0-9a-f]+ <[^>]*> f1c3 d2c0 	sc	v0,-64\(v1\)
+[0-9a-f]+ <[^>]*> f183 d2c0 	sc	v0,-128\(v1\)
+[0-9a-f]+ <[^>]*> f103 d2c0 	sc	v0,-256\(v1\)
+[0-9a-f]+ <[^>]*> f003 d2e0 	swl	v0,0\(v1\)
+[0-9a-f]+ <[^>]*> f003 d2e1 	swl	v0,1\(v1\)
+[0-9a-f]+ <[^>]*> f003 d2e2 	swl	v0,2\(v1\)
+[0-9a-f]+ <[^>]*> f003 d2e3 	swl	v0,3\(v1\)
+[0-9a-f]+ <[^>]*> f003 d2e4 	swl	v0,4\(v1\)
+[0-9a-f]+ <[^>]*> f003 d2e8 	swl	v0,8\(v1\)
+[0-9a-f]+ <[^>]*> f003 d2f0 	swl	v0,16\(v1\)
+[0-9a-f]+ <[^>]*> f023 d2e0 	swl	v0,32\(v1\)
+[0-9a-f]+ <[^>]*> f043 d2e0 	swl	v0,64\(v1\)
+[0-9a-f]+ <[^>]*> f083 d2e0 	swl	v0,128\(v1\)
+[0-9a-f]+ <[^>]*> f0e3 d2ff 	swl	v0,255\(v1\)
+[0-9a-f]+ <[^>]*> f1e3 d2ff 	swl	v0,-1\(v1\)
+[0-9a-f]+ <[^>]*> f1e3 d2fe 	swl	v0,-2\(v1\)
+[0-9a-f]+ <[^>]*> f1e3 d2fd 	swl	v0,-3\(v1\)
+[0-9a-f]+ <[^>]*> f1e3 d2fc 	swl	v0,-4\(v1\)
+[0-9a-f]+ <[^>]*> f1e3 d2f8 	swl	v0,-8\(v1\)
+[0-9a-f]+ <[^>]*> f1e3 d2f0 	swl	v0,-16\(v1\)
+[0-9a-f]+ <[^>]*> f1e3 d2e0 	swl	v0,-32\(v1\)
+[0-9a-f]+ <[^>]*> f1c3 d2e0 	swl	v0,-64\(v1\)
+[0-9a-f]+ <[^>]*> f183 d2e0 	swl	v0,-128\(v1\)
+[0-9a-f]+ <[^>]*> f103 d2e0 	swl	v0,-256\(v1\)
+[0-9a-f]+ <[^>]*> f013 d2e0 	swr	v0,0\(v1\)
+[0-9a-f]+ <[^>]*> f013 d2e1 	swr	v0,1\(v1\)
+[0-9a-f]+ <[^>]*> f013 d2e2 	swr	v0,2\(v1\)
+[0-9a-f]+ <[^>]*> f013 d2e3 	swr	v0,3\(v1\)
+[0-9a-f]+ <[^>]*> f013 d2e4 	swr	v0,4\(v1\)
+[0-9a-f]+ <[^>]*> f013 d2e8 	swr	v0,8\(v1\)
+[0-9a-f]+ <[^>]*> f013 d2f0 	swr	v0,16\(v1\)
+[0-9a-f]+ <[^>]*> f033 d2e0 	swr	v0,32\(v1\)
+[0-9a-f]+ <[^>]*> f053 d2e0 	swr	v0,64\(v1\)
+[0-9a-f]+ <[^>]*> f093 d2e0 	swr	v0,128\(v1\)
+[0-9a-f]+ <[^>]*> f0f3 d2ff 	swr	v0,255\(v1\)
+[0-9a-f]+ <[^>]*> f1f3 d2ff 	swr	v0,-1\(v1\)
+[0-9a-f]+ <[^>]*> f1f3 d2fe 	swr	v0,-2\(v1\)
+[0-9a-f]+ <[^>]*> f1f3 d2fd 	swr	v0,-3\(v1\)
+[0-9a-f]+ <[^>]*> f1f3 d2fc 	swr	v0,-4\(v1\)
+[0-9a-f]+ <[^>]*> f1f3 d2f8 	swr	v0,-8\(v1\)
+[0-9a-f]+ <[^>]*> f1f3 d2f0 	swr	v0,-16\(v1\)
+[0-9a-f]+ <[^>]*> f1f3 d2e0 	swr	v0,-32\(v1\)
+[0-9a-f]+ <[^>]*> f1d3 d2e0 	swr	v0,-64\(v1\)
+[0-9a-f]+ <[^>]*> f193 d2e0 	swr	v0,-128\(v1\)
+[0-9a-f]+ <[^>]*> f113 d2e0 	swr	v0,-256\(v1\)
+[0-9a-f]+ <[^>]*> f002 d3a0 	cache	0x2,0\(v1\)
+[0-9a-f]+ <[^>]*> f002 d3a1 	cache	0x2,1\(v1\)
+[0-9a-f]+ <[^>]*> f002 d3a2 	cache	0x2,2\(v1\)
+[0-9a-f]+ <[^>]*> f002 d3a3 	cache	0x2,3\(v1\)
+[0-9a-f]+ <[^>]*> f002 d3a4 	cache	0x2,4\(v1\)
+[0-9a-f]+ <[^>]*> f002 d3a8 	cache	0x2,8\(v1\)
+[0-9a-f]+ <[^>]*> f002 d3b0 	cache	0x2,16\(v1\)
+[0-9a-f]+ <[^>]*> f022 d3a0 	cache	0x2,32\(v1\)
+[0-9a-f]+ <[^>]*> f042 d3a0 	cache	0x2,64\(v1\)
+[0-9a-f]+ <[^>]*> f082 d3a0 	cache	0x2,128\(v1\)
+[0-9a-f]+ <[^>]*> f0e2 d3bf 	cache	0x2,255\(v1\)
+[0-9a-f]+ <[^>]*> f1e2 d3bf 	cache	0x2,-1\(v1\)
+[0-9a-f]+ <[^>]*> f1e2 d3be 	cache	0x2,-2\(v1\)
+[0-9a-f]+ <[^>]*> f1e2 d3bd 	cache	0x2,-3\(v1\)
+[0-9a-f]+ <[^>]*> f1e2 d3bc 	cache	0x2,-4\(v1\)
+[0-9a-f]+ <[^>]*> f1e2 d3b8 	cache	0x2,-8\(v1\)
+[0-9a-f]+ <[^>]*> f1e2 d3b0 	cache	0x2,-16\(v1\)
+[0-9a-f]+ <[^>]*> f1e2 d3a0 	cache	0x2,-32\(v1\)
+[0-9a-f]+ <[^>]*> f1c2 d3a0 	cache	0x2,-64\(v1\)
+[0-9a-f]+ <[^>]*> f182 d3a0 	cache	0x2,-128\(v1\)
+[0-9a-f]+ <[^>]*> f102 d3a0 	cache	0x2,-256\(v1\)
+[0-9a-f]+ <[^>]*> f01d d3a0 	cache	0x1d,0\(v1\)
+[0-9a-f]+ <[^>]*> f01d d3a1 	cache	0x1d,1\(v1\)
+[0-9a-f]+ <[^>]*> f01d d3a2 	cache	0x1d,2\(v1\)
+[0-9a-f]+ <[^>]*> f01d d3a3 	cache	0x1d,3\(v1\)
+[0-9a-f]+ <[^>]*> f01d d3a4 	cache	0x1d,4\(v1\)
+[0-9a-f]+ <[^>]*> f01d d3a8 	cache	0x1d,8\(v1\)
+[0-9a-f]+ <[^>]*> f01d d3b0 	cache	0x1d,16\(v1\)
+[0-9a-f]+ <[^>]*> f03d d3a0 	cache	0x1d,32\(v1\)
+[0-9a-f]+ <[^>]*> f05d d3a0 	cache	0x1d,64\(v1\)
+[0-9a-f]+ <[^>]*> f09d d3a0 	cache	0x1d,128\(v1\)
+[0-9a-f]+ <[^>]*> f0fd d3bf 	cache	0x1d,255\(v1\)
+[0-9a-f]+ <[^>]*> f1fd d3bf 	cache	0x1d,-1\(v1\)
+[0-9a-f]+ <[^>]*> f1fd d3be 	cache	0x1d,-2\(v1\)
+[0-9a-f]+ <[^>]*> f1fd d3bd 	cache	0x1d,-3\(v1\)
+[0-9a-f]+ <[^>]*> f1fd d3bc 	cache	0x1d,-4\(v1\)
+[0-9a-f]+ <[^>]*> f1fd d3b8 	cache	0x1d,-8\(v1\)
+[0-9a-f]+ <[^>]*> f1fd d3b0 	cache	0x1d,-16\(v1\)
+[0-9a-f]+ <[^>]*> f1fd d3a0 	cache	0x1d,-32\(v1\)
+[0-9a-f]+ <[^>]*> f1dd d3a0 	cache	0x1d,-64\(v1\)
+[0-9a-f]+ <[^>]*> f19d d3a0 	cache	0x1d,-128\(v1\)
+[0-9a-f]+ <[^>]*> f11d d3a0 	cache	0x1d,-256\(v1\)
+[0-9a-f]+ <[^>]*> f008 d380 	pref	0x8,0\(v1\)
+[0-9a-f]+ <[^>]*> f008 d381 	pref	0x8,1\(v1\)
+[0-9a-f]+ <[^>]*> f008 d382 	pref	0x8,2\(v1\)
+[0-9a-f]+ <[^>]*> f008 d383 	pref	0x8,3\(v1\)
+[0-9a-f]+ <[^>]*> f008 d384 	pref	0x8,4\(v1\)
+[0-9a-f]+ <[^>]*> f008 d388 	pref	0x8,8\(v1\)
+[0-9a-f]+ <[^>]*> f008 d390 	pref	0x8,16\(v1\)
+[0-9a-f]+ <[^>]*> f028 d380 	pref	0x8,32\(v1\)
+[0-9a-f]+ <[^>]*> f048 d380 	pref	0x8,64\(v1\)
+[0-9a-f]+ <[^>]*> f088 d380 	pref	0x8,128\(v1\)
+[0-9a-f]+ <[^>]*> f0e8 d39f 	pref	0x8,255\(v1\)
+[0-9a-f]+ <[^>]*> f1e8 d39f 	pref	0x8,-1\(v1\)
+[0-9a-f]+ <[^>]*> f1e8 d39e 	pref	0x8,-2\(v1\)
+[0-9a-f]+ <[^>]*> f1e8 d39d 	pref	0x8,-3\(v1\)
+[0-9a-f]+ <[^>]*> f1e8 d39c 	pref	0x8,-4\(v1\)
+[0-9a-f]+ <[^>]*> f1e8 d398 	pref	0x8,-8\(v1\)
+[0-9a-f]+ <[^>]*> f1e8 d390 	pref	0x8,-16\(v1\)
+[0-9a-f]+ <[^>]*> f1e8 d380 	pref	0x8,-32\(v1\)
+[0-9a-f]+ <[^>]*> f1c8 d380 	pref	0x8,-64\(v1\)
+[0-9a-f]+ <[^>]*> f188 d380 	pref	0x8,-128\(v1\)
+[0-9a-f]+ <[^>]*> f108 d380 	pref	0x8,-256\(v1\)
+[0-9a-f]+ <[^>]*> f017 d380 	pref	0x17,0\(v1\)
+[0-9a-f]+ <[^>]*> f017 d381 	pref	0x17,1\(v1\)
+[0-9a-f]+ <[^>]*> f017 d382 	pref	0x17,2\(v1\)
+[0-9a-f]+ <[^>]*> f017 d383 	pref	0x17,3\(v1\)
+[0-9a-f]+ <[^>]*> f017 d384 	pref	0x17,4\(v1\)
+[0-9a-f]+ <[^>]*> f017 d388 	pref	0x17,8\(v1\)
+[0-9a-f]+ <[^>]*> f017 d390 	pref	0x17,16\(v1\)
+[0-9a-f]+ <[^>]*> f037 d380 	pref	0x17,32\(v1\)
+[0-9a-f]+ <[^>]*> f057 d380 	pref	0x17,64\(v1\)
+[0-9a-f]+ <[^>]*> f097 d380 	pref	0x17,128\(v1\)
+[0-9a-f]+ <[^>]*> f0f7 d39f 	pref	0x17,255\(v1\)
+[0-9a-f]+ <[^>]*> f1f7 d39f 	pref	0x17,-1\(v1\)
+[0-9a-f]+ <[^>]*> f1f7 d39e 	pref	0x17,-2\(v1\)
+[0-9a-f]+ <[^>]*> f1f7 d39d 	pref	0x17,-3\(v1\)
+[0-9a-f]+ <[^>]*> f1f7 d39c 	pref	0x17,-4\(v1\)
+[0-9a-f]+ <[^>]*> f1f7 d398 	pref	0x17,-8\(v1\)
+[0-9a-f]+ <[^>]*> f1f7 d390 	pref	0x17,-16\(v1\)
+[0-9a-f]+ <[^>]*> f1f7 d380 	pref	0x17,-32\(v1\)
+[0-9a-f]+ <[^>]*> f1d7 d380 	pref	0x17,-64\(v1\)
+[0-9a-f]+ <[^>]*> f197 d380 	pref	0x17,-128\(v1\)
+[0-9a-f]+ <[^>]*> f117 d380 	pref	0x17,-256\(v1\)
+[0-9a-f]+ <[^>]*> f000 0220 	addiu	v0,gp,0
+[0-9a-f]+ <[^>]*> f000 0221 	addiu	v0,gp,1
+[0-9a-f]+ <[^>]*> f000 0222 	addiu	v0,gp,2
+[0-9a-f]+ <[^>]*> f000 0224 	addiu	v0,gp,4
+[0-9a-f]+ <[^>]*> f000 0228 	addiu	v0,gp,8
+[0-9a-f]+ <[^>]*> f000 0230 	addiu	v0,gp,16
+[0-9a-f]+ <[^>]*> f020 0220 	addiu	v0,gp,32
+[0-9a-f]+ <[^>]*> f040 0220 	addiu	v0,gp,64
+[0-9a-f]+ <[^>]*> f080 0220 	addiu	v0,gp,128
+[0-9a-f]+ <[^>]*> f100 0220 	addiu	v0,gp,256
+[0-9a-f]+ <[^>]*> f200 0220 	addiu	v0,gp,512
+[0-9a-f]+ <[^>]*> f400 0220 	addiu	v0,gp,1024
+[0-9a-f]+ <[^>]*> f001 0220 	addiu	v0,gp,2048
+[0-9a-f]+ <[^>]*> f002 0220 	addiu	v0,gp,4096
+[0-9a-f]+ <[^>]*> f004 0220 	addiu	v0,gp,8192
+[0-9a-f]+ <[^>]*> f008 0220 	addiu	v0,gp,16384
+[0-9a-f]+ <[^>]*> f7ef 023f 	addiu	v0,gp,32767
+[0-9a-f]+ <[^>]*> f7ff 023f 	addiu	v0,gp,-1
+[0-9a-f]+ <[^>]*> f7ff 023e 	addiu	v0,gp,-2
+[0-9a-f]+ <[^>]*> f7ff 023c 	addiu	v0,gp,-4
+[0-9a-f]+ <[^>]*> f7ff 0238 	addiu	v0,gp,-8
+[0-9a-f]+ <[^>]*> f7ff 0230 	addiu	v0,gp,-16
+[0-9a-f]+ <[^>]*> f7ff 0220 	addiu	v0,gp,-32
+[0-9a-f]+ <[^>]*> f7df 0220 	addiu	v0,gp,-64
+[0-9a-f]+ <[^>]*> f79f 0220 	addiu	v0,gp,-128
+[0-9a-f]+ <[^>]*> f71f 0220 	addiu	v0,gp,-256
+[0-9a-f]+ <[^>]*> f61f 0220 	addiu	v0,gp,-512
+[0-9a-f]+ <[^>]*> f41f 0220 	addiu	v0,gp,-1024
+[0-9a-f]+ <[^>]*> f01f 0220 	addiu	v0,gp,-2048
+[0-9a-f]+ <[^>]*> f01e 0220 	addiu	v0,gp,-4096
+[0-9a-f]+ <[^>]*> f01c 0220 	addiu	v0,gp,-8192
+[0-9a-f]+ <[^>]*> f018 0220 	addiu	v0,gp,-16384
+[0-9a-f]+ <[^>]*> f010 0220 	addiu	v0,gp,-32768
+[0-9a-f]+ <[^>]*> f000 0220 	addiu	v0,gp,0
+[0-9a-f]+ <[^>]*> f000 0221 	addiu	v0,gp,1
+[0-9a-f]+ <[^>]*> f000 0222 	addiu	v0,gp,2
+[0-9a-f]+ <[^>]*> f000 0224 	addiu	v0,gp,4
+[0-9a-f]+ <[^>]*> f000 0228 	addiu	v0,gp,8
+[0-9a-f]+ <[^>]*> f000 0230 	addiu	v0,gp,16
+[0-9a-f]+ <[^>]*> f020 0220 	addiu	v0,gp,32
+[0-9a-f]+ <[^>]*> f040 0220 	addiu	v0,gp,64
+[0-9a-f]+ <[^>]*> f080 0220 	addiu	v0,gp,128
+[0-9a-f]+ <[^>]*> f100 0220 	addiu	v0,gp,256
+[0-9a-f]+ <[^>]*> f200 0220 	addiu	v0,gp,512
+[0-9a-f]+ <[^>]*> f400 0220 	addiu	v0,gp,1024
+[0-9a-f]+ <[^>]*> f001 0220 	addiu	v0,gp,2048
+[0-9a-f]+ <[^>]*> f002 0220 	addiu	v0,gp,4096
+[0-9a-f]+ <[^>]*> f004 0220 	addiu	v0,gp,8192
+[0-9a-f]+ <[^>]*> f008 0220 	addiu	v0,gp,16384
+[0-9a-f]+ <[^>]*> f7ef 023f 	addiu	v0,gp,32767
+[0-9a-f]+ <[^>]*> f7ff 023f 	addiu	v0,gp,-1
+[0-9a-f]+ <[^>]*> f7ff 023e 	addiu	v0,gp,-2
+[0-9a-f]+ <[^>]*> f7ff 023c 	addiu	v0,gp,-4
+[0-9a-f]+ <[^>]*> f7ff 0238 	addiu	v0,gp,-8
+[0-9a-f]+ <[^>]*> f7ff 0230 	addiu	v0,gp,-16
+[0-9a-f]+ <[^>]*> f7ff 0220 	addiu	v0,gp,-32
+[0-9a-f]+ <[^>]*> f7df 0220 	addiu	v0,gp,-64
+[0-9a-f]+ <[^>]*> f79f 0220 	addiu	v0,gp,-128
+[0-9a-f]+ <[^>]*> f71f 0220 	addiu	v0,gp,-256
+[0-9a-f]+ <[^>]*> f61f 0220 	addiu	v0,gp,-512
+[0-9a-f]+ <[^>]*> f41f 0220 	addiu	v0,gp,-1024
+[0-9a-f]+ <[^>]*> f01f 0220 	addiu	v0,gp,-2048
+[0-9a-f]+ <[^>]*> f01e 0220 	addiu	v0,gp,-4096
+[0-9a-f]+ <[^>]*> f01c 0220 	addiu	v0,gp,-8192
+[0-9a-f]+ <[^>]*> f018 0220 	addiu	v0,gp,-16384
+[0-9a-f]+ <[^>]*> f010 0220 	addiu	v0,gp,-32768
+[0-9a-f]+ <[^>]*> f000 6a20 	lui	v0,0x0
+[0-9a-f]+ <[^>]*> f000 6a21 	lui	v0,0x1
+[0-9a-f]+ <[^>]*> f000 6a22 	lui	v0,0x2
+[0-9a-f]+ <[^>]*> f000 6a24 	lui	v0,0x4
+[0-9a-f]+ <[^>]*> f000 6a28 	lui	v0,0x8
+[0-9a-f]+ <[^>]*> f000 6a30 	lui	v0,0x10
+[0-9a-f]+ <[^>]*> f020 6a20 	lui	v0,0x20
+[0-9a-f]+ <[^>]*> f040 6a20 	lui	v0,0x40
+[0-9a-f]+ <[^>]*> f080 6a20 	lui	v0,0x80
+[0-9a-f]+ <[^>]*> f100 6a20 	lui	v0,0x100
+[0-9a-f]+ <[^>]*> f200 6a20 	lui	v0,0x200
+[0-9a-f]+ <[^>]*> f400 6a20 	lui	v0,0x400
+[0-9a-f]+ <[^>]*> f001 6a20 	lui	v0,0x800
+[0-9a-f]+ <[^>]*> f002 6a20 	lui	v0,0x1000
+[0-9a-f]+ <[^>]*> f004 6a20 	lui	v0,0x2000
+[0-9a-f]+ <[^>]*> f008 6a20 	lui	v0,0x4000
+[0-9a-f]+ <[^>]*> f7ef 6a3f 	lui	v0,0x7fff
+[0-9a-f]+ <[^>]*> f010 6a20 	lui	v0,0x8000
+[0-9a-f]+ <[^>]*> f7ff 6a3f 	lui	v0,0xffff
+[0-9a-f]+ <[^>]*> f000 6a60 	andi	v0,0x0
+[0-9a-f]+ <[^>]*> f000 6a61 	andi	v0,0x1
+[0-9a-f]+ <[^>]*> f000 6a62 	andi	v0,0x2
+[0-9a-f]+ <[^>]*> f000 6a64 	andi	v0,0x4
+[0-9a-f]+ <[^>]*> f000 6a68 	andi	v0,0x8
+[0-9a-f]+ <[^>]*> f000 6a70 	andi	v0,0x10
+[0-9a-f]+ <[^>]*> f020 6a60 	andi	v0,0x20
+[0-9a-f]+ <[^>]*> f040 6a60 	andi	v0,0x40
+[0-9a-f]+ <[^>]*> f080 6a60 	andi	v0,0x80
+[0-9a-f]+ <[^>]*> f100 6a60 	andi	v0,0x100
+[0-9a-f]+ <[^>]*> f200 6a60 	andi	v0,0x200
+[0-9a-f]+ <[^>]*> f400 6a60 	andi	v0,0x400
+[0-9a-f]+ <[^>]*> f001 6a60 	andi	v0,0x800
+[0-9a-f]+ <[^>]*> f002 6a60 	andi	v0,0x1000
+[0-9a-f]+ <[^>]*> f004 6a60 	andi	v0,0x2000
+[0-9a-f]+ <[^>]*> f008 6a60 	andi	v0,0x4000
+[0-9a-f]+ <[^>]*> f7ef 6a7f 	andi	v0,0x7fff
+[0-9a-f]+ <[^>]*> f010 6a60 	andi	v0,0x8000
+[0-9a-f]+ <[^>]*> f7ff 6a7f 	andi	v0,0xffff
+[0-9a-f]+ <[^>]*> f000 6a40 	ori	v0,0x0
+[0-9a-f]+ <[^>]*> f000 6a41 	ori	v0,0x1
+[0-9a-f]+ <[^>]*> f000 6a42 	ori	v0,0x2
+[0-9a-f]+ <[^>]*> f000 6a44 	ori	v0,0x4
+[0-9a-f]+ <[^>]*> f000 6a48 	ori	v0,0x8
+[0-9a-f]+ <[^>]*> f000 6a50 	ori	v0,0x10
+[0-9a-f]+ <[^>]*> f020 6a40 	ori	v0,0x20
+[0-9a-f]+ <[^>]*> f040 6a40 	ori	v0,0x40
+[0-9a-f]+ <[^>]*> f080 6a40 	ori	v0,0x80
+[0-9a-f]+ <[^>]*> f100 6a40 	ori	v0,0x100
+[0-9a-f]+ <[^>]*> f200 6a40 	ori	v0,0x200
+[0-9a-f]+ <[^>]*> f400 6a40 	ori	v0,0x400
+[0-9a-f]+ <[^>]*> f001 6a40 	ori	v0,0x800
+[0-9a-f]+ <[^>]*> f002 6a40 	ori	v0,0x1000
+[0-9a-f]+ <[^>]*> f004 6a40 	ori	v0,0x2000
+[0-9a-f]+ <[^>]*> f008 6a40 	ori	v0,0x4000
+[0-9a-f]+ <[^>]*> f7ef 6a5f 	ori	v0,0x7fff
+[0-9a-f]+ <[^>]*> f010 6a40 	ori	v0,0x8000
+[0-9a-f]+ <[^>]*> f7ff 6a5f 	ori	v0,0xffff
+[0-9a-f]+ <[^>]*> f000 6a80 	xori	v0,0x0
+[0-9a-f]+ <[^>]*> f000 6a81 	xori	v0,0x1
+[0-9a-f]+ <[^>]*> f000 6a82 	xori	v0,0x2
+[0-9a-f]+ <[^>]*> f000 6a84 	xori	v0,0x4
+[0-9a-f]+ <[^>]*> f000 6a88 	xori	v0,0x8
+[0-9a-f]+ <[^>]*> f000 6a90 	xori	v0,0x10
+[0-9a-f]+ <[^>]*> f020 6a80 	xori	v0,0x20
+[0-9a-f]+ <[^>]*> f040 6a80 	xori	v0,0x40
+[0-9a-f]+ <[^>]*> f080 6a80 	xori	v0,0x80
+[0-9a-f]+ <[^>]*> f100 6a80 	xori	v0,0x100
+[0-9a-f]+ <[^>]*> f200 6a80 	xori	v0,0x200
+[0-9a-f]+ <[^>]*> f400 6a80 	xori	v0,0x400
+[0-9a-f]+ <[^>]*> f001 6a80 	xori	v0,0x800
+[0-9a-f]+ <[^>]*> f002 6a80 	xori	v0,0x1000
+[0-9a-f]+ <[^>]*> f004 6a80 	xori	v0,0x2000
+[0-9a-f]+ <[^>]*> f008 6a80 	xori	v0,0x4000
+[0-9a-f]+ <[^>]*> f7ef 6a9f 	xori	v0,0x7fff
+[0-9a-f]+ <[^>]*> f010 6a80 	xori	v0,0x8000
+[0-9a-f]+ <[^>]*> f7ff 6a9f 	xori	v0,0xffff
+[0-9a-f]+ <[^>]*> f03f 3348 	ext	v0,v1,0x0,0x20
+[0-9a-f]+ <[^>]*> f078 3348 	ext	v0,v1,0x1,0x19
+[0-9a-f]+ <[^>]*> f0b0 3348 	ext	v0,v1,0x2,0x11
+[0-9a-f]+ <[^>]*> f0ec 3348 	ext	v0,v1,0x3,0xd
+[0-9a-f]+ <[^>]*> f128 3348 	ext	v0,v1,0x4,0x9
+[0-9a-f]+ <[^>]*> f1a6 3348 	ext	v0,v1,0x6,0x7
+[0-9a-f]+ <[^>]*> f224 3348 	ext	v0,v1,0x8,0x5
+[0-9a-f]+ <[^>]*> f323 3348 	ext	v0,v1,0xc,0x4
+[0-9a-f]+ <[^>]*> f422 3348 	ext	v0,v1,0x10,0x3
+[0-9a-f]+ <[^>]*> f621 3348 	ext	v0,v1,0x18,0x2
+[0-9a-f]+ <[^>]*> f7e0 3348 	ext	v0,v1,0x1f,0x1
+[0-9a-f]+ <[^>]*> f03f 3344 	ins	v0,v1,0x0,0x20
+[0-9a-f]+ <[^>]*> f079 3344 	ins	v0,v1,0x1,0x19
+[0-9a-f]+ <[^>]*> f0b2 3344 	ins	v0,v1,0x2,0x11
+[0-9a-f]+ <[^>]*> f0ef 3344 	ins	v0,v1,0x3,0xd
+[0-9a-f]+ <[^>]*> f12c 3344 	ins	v0,v1,0x4,0x9
+[0-9a-f]+ <[^>]*> f1ac 3344 	ins	v0,v1,0x6,0x7
+[0-9a-f]+ <[^>]*> f22c 3344 	ins	v0,v1,0x8,0x5
+[0-9a-f]+ <[^>]*> f32f 3344 	ins	v0,v1,0xc,0x4
+[0-9a-f]+ <[^>]*> f432 3344 	ins	v0,v1,0x10,0x3
+[0-9a-f]+ <[^>]*> f639 3344 	ins	v0,v1,0x18,0x2
+[0-9a-f]+ <[^>]*> f7ff 3344 	ins	v0,v1,0x1f,0x1
+[0-9a-f]+ <[^>]*> f01f 30c4 	ins	a2,zero,0x0,0x20
+[0-9a-f]+ <[^>]*> f059 30c4 	ins	a2,zero,0x1,0x19
+[0-9a-f]+ <[^>]*> f092 30c4 	ins	a2,zero,0x2,0x11
+[0-9a-f]+ <[^>]*> f0cf 30c4 	ins	a2,zero,0x3,0xd
+[0-9a-f]+ <[^>]*> f10c 30c4 	ins	a2,zero,0x4,0x9
+[0-9a-f]+ <[^>]*> f18c 30c4 	ins	a2,zero,0x6,0x7
+[0-9a-f]+ <[^>]*> f20c 30c4 	ins	a2,zero,0x8,0x5
+[0-9a-f]+ <[^>]*> f30f 30c4 	ins	a2,zero,0xc,0x4
+[0-9a-f]+ <[^>]*> f412 30c4 	ins	a2,zero,0x10,0x3
+[0-9a-f]+ <[^>]*> f619 30c4 	ins	a2,zero,0x18,0x2
+[0-9a-f]+ <[^>]*> f7df 30c4 	ins	a2,zero,0x1f,0x1
+[0-9a-f]+ <[^>]*> f023 328a 	movn	v0,v1,a0
+[0-9a-f]+ <[^>]*> f025 344a 	movn	a0,a1,v0
+[0-9a-f]+ <[^>]*> f026 372a 	movn	a3,a2,s1
+[0-9a-f]+ <[^>]*> f000 328a 	movn	v0,zero,a0
+[0-9a-f]+ <[^>]*> f023 3286 	movz	v0,v1,a0
+[0-9a-f]+ <[^>]*> f025 3446 	movz	a0,a1,v0
+[0-9a-f]+ <[^>]*> f026 31e6 	movz	s1,a2,a3
+[0-9a-f]+ <[^>]*> f000 3286 	movz	v0,zero,a0
+[0-9a-f]+ <[^>]*> f023 321a 	movtn	v0,v1
+[0-9a-f]+ <[^>]*> f025 341a 	movtn	a0,a1
+[0-9a-f]+ <[^>]*> f026 371a 	movtn	a3,a2
+[0-9a-f]+ <[^>]*> f000 321a 	movtn	v0,zero
+[0-9a-f]+ <[^>]*> f023 3216 	movtz	v0,v1
+[0-9a-f]+ <[^>]*> f025 3416 	movtz	a0,a1
+[0-9a-f]+ <[^>]*> f026 3116 	movtz	s1,a2
+[0-9a-f]+ <[^>]*> f000 3216 	movtz	v0,zero
+[0-9a-f]+ <[^>]*> f0c0 3010 	ehb
+[0-9a-f]+ <[^>]*> f140 3018 	pause
+[0-9a-f]+ <[^>]*> f000 3014 	sync
+[0-9a-f]+ <[^>]*> f040 3014 	sync	0x1
+[0-9a-f]+ <[^>]*> f100 3014 	sync_wmb
+[0-9a-f]+ <[^>]*> f340 3014 	sync	0xd
+[0-9a-f]+ <[^>]*> f7c0 3014 	sync	0x1f
+[0-9a-f]+ <[^>]*> f100 3014 	sync_wmb
+[0-9a-f]+ <[^>]*> f400 3014 	sync_mb
+[0-9a-f]+ <[^>]*> f440 3014 	sync_acquire
+[0-9a-f]+ <[^>]*> f480 3014 	sync_release
+[0-9a-f]+ <[^>]*> f4c0 3014 	sync_rmb
+[0-9a-f]+ <[^>]*> f001 304c 	rdhwr	v0,hwr_synci_step
+[0-9a-f]+ <[^>]*> f005 306c 	rdhwr	v1,\$5
+[0-9a-f]+ <[^>]*> f01d 308c 	rdhwr	a0,\$29
+[0-9a-f]+ <[^>]*> f01f 30ac 	rdhwr	a1,\$31
+[0-9a-f]+ <[^>]*> f006 670c 	di
+[0-9a-f]+ <[^>]*> f006 670c 	di
+[0-9a-f]+ <[^>]*> f002 674c 	di	v0
+[0-9a-f]+ <[^>]*> f007 670c 	ei
+[0-9a-f]+ <[^>]*> f007 670c 	ei
+[0-9a-f]+ <[^>]*> f003 674c 	ei	v0
+[0-9a-f]+ <[^>]*> f000 6765 	mfc0	v1,c0_pagemask
+[0-9a-f]+ <[^>]*> f000 67a9 	mfc0	a1,c0_count
+[0-9a-f]+ <[^>]*> f060 67ed 	mfc0	a3,\$13,3
+[0-9a-f]+ <[^>]*> f020 672f 	mfc0	s1,c0_ebase
+[0-9a-f]+ <[^>]*> f0e0 6751 	mfc0	v0,\$17,7
+[0-9a-f]+ <[^>]*> f000 67d5 	mfc0	a2,\$21
+[0-9a-f]+ <[^>]*> f001 6765 	mtc0	v1,c0_pagemask
+[0-9a-f]+ <[^>]*> f001 67a9 	mtc0	a1,c0_count
+[0-9a-f]+ <[^>]*> f061 67ed 	mtc0	a3,\$13,3
+[0-9a-f]+ <[^>]*> f021 672f 	mtc0	s1,c0_ebase
+[0-9a-f]+ <[^>]*> f0e1 6751 	mtc0	v0,\$17,7
+[0-9a-f]+ <[^>]*> f001 67d5 	mtc0	a2,\$21
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/mips16e2.s b/gas/testsuite/gas/mips/mips16e2.s
new file mode 100644
index 00000000000..2cef4b89927
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2.s
@@ -0,0 +1,210 @@
+	.set	mips16
+
+	.macro	mem9pos op, ri, base
+	\op	\ri,0(\base)
+	\op	\ri,1(\base)
+	\op	\ri,2(\base)
+	\op	\ri,3(\base)
+	\op	\ri,4(\base)
+	\op	\ri,8(\base)
+	\op	\ri,16(\base)
+	\op	\ri,32(\base)
+	\op	\ri,64(\base)
+	\op	\ri,128(\base)
+	\op	\ri,255(\base)
+	.endm
+
+	.macro	mem9neg op, ri, base
+	\op	\ri,-1(\base)
+	\op	\ri,-2(\base)
+	\op	\ri,-3(\base)
+	\op	\ri,-4(\base)
+	\op	\ri,-8(\base)
+	\op	\ri,-16(\base)
+	\op	\ri,-32(\base)
+	\op	\ri,-64(\base)
+	\op	\ri,-128(\base)
+	\op	\ri,-256(\base)
+	.endm
+
+	.macro	mem9 op, ri, base
+	mem9pos	\op, \ri, \base
+	mem9neg	\op, \ri, \base
+	.endm
+
+	.macro	mem op, ri, base
+	mem9pos	\op, \ri, \base
+	\op	\ri,256(\base)
+	\op	\ri,512(\base)
+	\op	\ri,1024(\base)
+	\op	\ri,2048(\base)
+	\op	\ri,4096(\base)
+	\op	\ri,8192(\base)
+	\op	\ri,16384(\base)
+	\op	\ri,32767(\base)
+	mem9neg	\op, \ri, \base
+	\op	\ri,-512(\base)
+	\op	\ri,-1024(\base)
+	\op	\ri,-2048(\base)
+	\op	\ri,-4096(\base)
+	\op	\ri,-8192(\base)
+	\op	\ri,-16384(\base)
+	\op	\ri,-32768(\base)
+	.endm
+
+	.macro	alupos op, args:vararg
+	\op	\args, 0
+	\op	\args, 1
+	\op	\args, 2
+	\op	\args, 4
+	\op	\args, 8
+	\op	\args, 16
+	\op	\args, 32
+	\op	\args, 64
+	\op	\args, 128
+	\op	\args, 256
+	\op	\args, 512
+	\op	\args, 1024
+	\op	\args, 2048
+	\op	\args, 4096
+	\op	\args, 8192
+	\op	\args, 16384
+	\op	\args, 32767
+	.endm
+
+	.macro	aluneg op, args:vararg
+	\op	\args, -1
+	\op	\args, -2
+	\op	\args, -4
+	\op	\args, -8
+	\op	\args, -16
+	\op	\args, -32
+	\op	\args, -64
+	\op	\args, -128
+	\op	\args, -256
+	\op	\args, -512
+	\op	\args, -1024
+	\op	\args, -2048
+	\op	\args, -4096
+	\op	\args, -8192
+	\op	\args, -16384
+	\op	\args, -32768
+	.endm
+
+	.macro	aluu op, args:vararg
+	alupos	\op, \args
+	\op	\args, 32768
+	\op	\args, 65535
+	.endm
+
+	.macro	alu op, args:vararg
+	alupos	\op, \args
+	aluneg	\op, \args
+	.endm
+
+	.macro	bit op, ry, rx
+	\op	\ry, \rx, 0, 32
+	\op	\ry, \rx, 1, 25
+	\op	\ry, \rx, 2, 17
+	\op	\ry, \rx, 3, 13
+	\op	\ry, \rx, 4, 9
+	\op	\ry, \rx, 6, 7
+	\op	\ry, \rx, 8, 5
+	\op	\ry, \rx, 12, 4
+	\op	\ry, \rx, 16, 3
+	\op	\ry, \rx, 24, 2
+	\op	\ry, \rx, 31, 1
+	.endm
+
+foo:
+	mem	lw, $2, $gp
+	mem	lh, $2, $gp
+	mem	lhu, $2, $gp
+	mem	lb, $2, $gp
+	mem	lbu, $2, $gp
+	mem	sw, $2, $gp
+	mem	sh, $2, $gp
+	mem	sb, $2, $gp
+
+	mem9	ll, $2, $3
+	mem9	lwl, $2, $3
+	mem9	lwr, $2, $3
+	mem9	sc, $2, $3
+	mem9	swl, $2, $3
+	mem9	swr, $2, $3
+	mem9	cache, 2, $3
+	mem9	cache, 29, $3
+	mem9	pref, 8, $3
+	mem9	pref, 23, $3
+
+	alu	addiu, $2, $gp
+	alu	addu, $2, $gp
+	aluu	lui, $2
+	aluu	andi, $2
+	aluu	ori, $2
+	aluu	xori, $2
+
+	bit	ext, $2, $3
+	bit	ins, $2, $3
+	bit	ins, $6, $0
+
+	movn	$2, $3, $4
+	movn	$4, $5, $2
+	movn	$7, $6, $17
+	movn	$2, $0, $4
+	movz	$2, $3, $4
+	movz	$4, $5, $2
+	movz	$17, $6, $7
+	movz	$2, $0, $4
+
+	movtn	$2, $3
+	movtn	$4, $5
+	movtn	$7, $6
+	movtn	$2, $0
+	movtz	$2, $3
+	movtz	$4, $5
+	movtz	$17, $6
+	movtz	$2, $0
+
+	ehb
+	pause
+
+	sync
+	sync	1
+	sync	4
+	sync	13
+	sync	31
+	sync_wmb
+	sync_mb
+	sync_acquire
+	sync_release
+	sync_rmb
+
+	rdhwr	$2, $1
+	rdhwr	$3, $5
+	rdhwr	$4, $29
+	rdhwr	$5, $31
+
+	di
+	di	$0
+	di	$2
+	ei
+	ei	$0
+	ei	$2
+
+	mfc0	$3, $5
+	mfc0	$5, $9, 0
+	mfc0	$7, $13, 3
+	mfc0	$17, $15, 1
+	mfc0	$2, $17, 7
+	mfc0	$6, $21
+	mtc0	$3, $5
+	mtc0	$5, $9, 0
+	mtc0	$7, $13, 3
+	mtc0	$17, $15, 1
+	mtc0	$2, $17, 7
+	mtc0	$6, $21
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+	.space	16
+	.align	4, 0
diff --git a/gas/testsuite/gas/mips/mips16e2@lui-2.d b/gas/testsuite/gas/mips/mips16e2@lui-2.d
new file mode 100644
index 00000000000..e030ec2734e
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2@lui-2.d
@@ -0,0 +1,4 @@
+#name: MIPS LUI errors 2
+#as: -32
+#error-output: mips16e2@lui-2.l
+#source: lui-2.s
diff --git a/gas/testsuite/gas/mips/mips16e2@lui-2.l b/gas/testsuite/gas/mips/mips16e2@lui-2.l
new file mode 100644
index 00000000000..f83b9c80be8
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2@lui-2.l
@@ -0,0 +1,5 @@
+.*: Assembler messages:
+.*:7: Error: operand 2 must be constant `lui \$2,bar-foo'
+.*:8: Error: operand 2 must be constant `lui \$2,baz-bar'
+.*:9: Error: operand 2 must be constant `lui \$2,foo-baz'
+.*:10: Error: operand 2 must be constant `lui \$2,bar/baz'
diff --git a/gas/testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d b/gas/testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d
new file mode 100644
index 00000000000..a7498f61297
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d
@@ -0,0 +1,34 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16e2 MT ASE subset disassembly
+#as: -32 -I$srcdir/$subdir
+#source: mips16e2-mt-sub.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> f0c0 3010 	ehb
+[0-9a-f]+ <[^>]*> f026      	extend	0x26
+[0-9a-f]+ <[^>]*> 6701      	move	s0,at
+[0-9a-f]+ <[^>]*> f026      	extend	0x26
+[0-9a-f]+ <[^>]*> 6701      	move	s0,at
+[0-9a-f]+ <[^>]*> f022      	extend	0x22
+[0-9a-f]+ <[^>]*> 6741      	move	v0,at
+[0-9a-f]+ <[^>]*> f027      	extend	0x27
+[0-9a-f]+ <[^>]*> 6701      	move	s0,at
+[0-9a-f]+ <[^>]*> f027      	extend	0x27
+[0-9a-f]+ <[^>]*> 6701      	move	s0,at
+[0-9a-f]+ <[^>]*> f023      	extend	0x23
+[0-9a-f]+ <[^>]*> 6741      	move	v0,at
+[0-9a-f]+ <[^>]*> f026      	extend	0x26
+[0-9a-f]+ <[^>]*> 6700      	move	s0,zero
+[0-9a-f]+ <[^>]*> f026      	extend	0x26
+[0-9a-f]+ <[^>]*> 6700      	move	s0,zero
+[0-9a-f]+ <[^>]*> f022      	extend	0x22
+[0-9a-f]+ <[^>]*> 6740      	move	v0,zero
+[0-9a-f]+ <[^>]*> f027      	extend	0x27
+[0-9a-f]+ <[^>]*> 6700      	move	s0,zero
+[0-9a-f]+ <[^>]*> f027      	extend	0x27
+[0-9a-f]+ <[^>]*> 6700      	move	s0,zero
+[0-9a-f]+ <[^>]*> f023      	extend	0x23
+[0-9a-f]+ <[^>]*> 6740      	move	v0,zero
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/mips16e2@mips16e2-sub.d b/gas/testsuite/gas/mips/mips16e2@mips16e2-sub.d
new file mode 100644
index 00000000000..19a6642e127
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2@mips16e2-sub.d
@@ -0,0 +1,5 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16e2 ASE subset disassembly
+#as: -32 -I$srcdir/$subdir
+#source: mips16e2-sub.s
+#dump: mips16e2.d
diff --git a/gas/testsuite/gas/mips/mips16e2@mips32r2-sync-1.d b/gas/testsuite/gas/mips/mips16e2@mips32r2-sync-1.d
new file mode 100644
index 00000000000..5b5e94a3b3a
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2@mips32r2-sync-1.d
@@ -0,0 +1,29 @@
+#objdump: -dr --prefix-addresses --show-raw-insn -M no-aliases
+#name: MIPS32r2 sync instructions 1
+#as: -32
+#source: mips32r2-sync.s
+
+# Check MIPS32r2 sync instructions assembly and disassembly (MIPS16e2).
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> f000 3014 	sync
+[0-9a-f]+ <[^>]*> f080 3014 	sync	0x2
+[0-9a-f]+ <[^>]*> f100 3014 	sync	0x4
+[0-9a-f]+ <[^>]*> f200 3014 	sync	0x8
+[0-9a-f]+ <[^>]*> f400 3014 	sync	0x10
+[0-9a-f]+ <[^>]*> f440 3014 	sync	0x11
+[0-9a-f]+ <[^>]*> f480 3014 	sync	0x12
+[0-9a-f]+ <[^>]*> f4c0 3014 	sync	0x13
+[0-9a-f]+ <[^>]*> f600 3014 	sync	0x18
+[0-9a-f]+ <[^>]*> f000 3014 	sync
+[0-9a-f]+ <[^>]*> f080 3014 	sync	0x2
+[0-9a-f]+ <[^>]*> f100 3014 	sync	0x4
+[0-9a-f]+ <[^>]*> f200 3014 	sync	0x8
+[0-9a-f]+ <[^>]*> f400 3014 	sync	0x10
+[0-9a-f]+ <[^>]*> f440 3014 	sync	0x11
+[0-9a-f]+ <[^>]*> f480 3014 	sync	0x12
+[0-9a-f]+ <[^>]*> f4c0 3014 	sync	0x13
+[0-9a-f]+ <[^>]*> f600 3014 	sync	0x18
+	\.\.\.
diff --git a/gas/testsuite/gas/mips/mips16e2@mips32r2-sync.d b/gas/testsuite/gas/mips/mips16e2@mips32r2-sync.d
new file mode 100644
index 00000000000..937d219f124
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2@mips32r2-sync.d
@@ -0,0 +1,29 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS32r2 sync instructions
+#as: -32
+#source: mips32r2-sync.s
+
+# Check MIPS32r2 sync instructions assembly and disassembly (MIPS16e2).
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> f000 3014 	sync
+[0-9a-f]+ <[^>]*> f080 3014 	sync	0x2
+[0-9a-f]+ <[^>]*> f100 3014 	sync_wmb
+[0-9a-f]+ <[^>]*> f200 3014 	sync	0x8
+[0-9a-f]+ <[^>]*> f400 3014 	sync_mb
+[0-9a-f]+ <[^>]*> f440 3014 	sync_acquire
+[0-9a-f]+ <[^>]*> f480 3014 	sync_release
+[0-9a-f]+ <[^>]*> f4c0 3014 	sync_rmb
+[0-9a-f]+ <[^>]*> f600 3014 	sync	0x18
+[0-9a-f]+ <[^>]*> f000 3014 	sync
+[0-9a-f]+ <[^>]*> f080 3014 	sync	0x2
+[0-9a-f]+ <[^>]*> f100 3014 	sync_wmb
+[0-9a-f]+ <[^>]*> f200 3014 	sync	0x8
+[0-9a-f]+ <[^>]*> f400 3014 	sync_mb
+[0-9a-f]+ <[^>]*> f440 3014 	sync_acquire
+[0-9a-f]+ <[^>]*> f480 3014 	sync_release
+[0-9a-f]+ <[^>]*> f4c0 3014 	sync_rmb
+[0-9a-f]+ <[^>]*> f600 3014 	sync	0x18
+	\.\.\.
author	Maciej W. Rozycki <macro@imgtec.com>	2017-05-15 13:45:42 +0100
committer	Maciej W. Rozycki <macro@imgtec.com>	2017-05-15 13:57:11 +0100
commit	3f3467ffc4b0a397a7017b8ab729e4c0060b25f0 (patch)
tree	0b5a9c3e25ca4cdcc7666e569ead5dea2bc1b09f /gas
parent	MIPS16e2: Add MIPS16e2 ASE GAS test infrastructure (diff)
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