Remove high bit set characters

gas/
	* doc/c-lm32.texi: Fix chars with high bit set.
	* testsuite/gas/bfin/vector2.s: Likewise.
gold/
	* arm.cc: Fix comment chars with high bit set.
include/
	* coff/pe.h: Fix comment chars with high bit set.
	* opcode/xgate.h: Likewise.
ld/
	* testsuite/ld-scripts/sysroot-prefix.exp: Fix chars with high bit set.

10 files changed, 40 insertions, 22 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 6c923c316da..29c1c0adab8 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,10 @@
 2016-12-21  Alan Modra  <amodra@gmail.com>
 
+	* doc/c-lm32.texi: Fix chars with high bit set.
+	* testsuite/gas/bfin/vector2.s: Likewise.
+
+2016-12-21  Alan Modra  <amodra@gmail.com>
+
 	PR gas/10946
 	* doc/as.texinfo (Chars): Document escape sequences.
 
diff --git a/gas/doc/c-lm32.texi b/gas/doc/c-lm32.texi
index 6b535b73d15..fdfa70f7179 100644
--- a/gas/doc/c-lm32.texi
+++ b/gas/doc/c-lm32.texi
@@ -10,7 +10,7 @@
 
 @ifclear GENERIC
 @node Machine Dependencies
-@chapter LMŁ" Dependent Features
+@chapter LM32 Dependent Features
 @end ifclear
 
 @cindex LM32 support
diff --git a/gas/testsuite/gas/bfin/vector2.s b/gas/testsuite/gas/bfin/vector2.s
index be1a5b7b567..204f72d1ac2 100644
--- a/gas/testsuite/gas/bfin/vector2.s
+++ b/gas/testsuite/gas/bfin/vector2.s
@@ -93,7 +93,7 @@ r1=r2 +|+ r3 (SCO);
 r4=r3 +|+ r5 (SCO);
 r6=r3 +|+ r7 (SCO);
 
-//Dreg = Dreg –|+ Dreg (opt_mode_0) ; /* subtract | add (b) */
+//Dreg = Dreg -|+ Dreg (opt_mode_0) ; /* subtract | add (b) */
 r6=r0 -|+ r1(s) ; /* same as above, subtract|add with saturation */
 
 r0=r1 -|+ r2 ;
@@ -125,7 +125,7 @@ r4=r3 -|+ r5 (SCO);
 r6=r3 -|+ r7 (SCO);
 
 
-//Dreg = Dreg +|– Dreg (opt_mode_0) ; /* add | subtract (b) */
+//Dreg = Dreg +|- Dreg (opt_mode_0) ; /* add | subtract (b) */
 r0=r2 +|- r1(co) ; /* add|subtract with half-word results crossed over in the destination register */
 
 r0=r1 +|- r2 ;
@@ -156,7 +156,7 @@ r1=r2 +|- r3 (SCO);
 r4=r3 +|- r5 (SCO);
 r6=r3 +|- r7 (SCO);
 
-//Dreg = Dreg –|– Dreg (opt_mode_0) ; /* subtract | subtract (b) */
+//Dreg = Dreg -|- Dreg (opt_mode_0) ; /* subtract | subtract (b) */
 r7=r3 -|- r6(sco) ; /* subtract|subtract with saturation and half-word results crossed over in the destination register */
 
 r0=r1 -|- r2 ;
@@ -188,7 +188,7 @@ r4=r3 -|- r5 (SCO);
 r6=r3 -|- r7 (SCO);
 
 //Quad 16-Bit Operations
-//Dreg = Dreg +|+ Dreg, Dreg = Dreg –|– Dreg (opt_mode_0,opt_mode_2) ; /* add | add, subtract | subtract; the set of source registers must be the same for each operation (b) */
+//Dreg = Dreg +|+ Dreg, Dreg = Dreg -|- Dreg (opt_mode_0,opt_mode_2) ; /* add | add, subtract | subtract; the set of source registers must be the same for each operation (b) */
 r5=r3 +|+ r4, r7=r3-|-r4 ; /* quad 16-bit operations, add|add, subtract|subtract */
 
 r0=r1 +|+ r2, r7=r1 -|- r2;
@@ -284,7 +284,7 @@ r4=r3 +|+ r5, r3=r3 -|- r5(SCO,ASL);
 r6=r3 +|+ r7, r2=r3 -|- r7(SCO,ASL);
 
 
-//Dreg = Dreg +|– Dreg, Dreg = Dreg –|+ Dreg (opt_mode_0,opt_mode_2) ; /* add | subtract, subtract | add; the set of source registers must be the same for each operation (b) */
+//Dreg = Dreg +|- Dreg, Dreg = Dreg -|+ Dreg (opt_mode_0,opt_mode_2) ; /* add | subtract, subtract | add; the set of source registers must be the same for each operation (b) */
 r5=r3 +|- r4, r7=r3 -|+ r4 ; /* quad 16-bit operations, add|subtract, subtract|add */
 
 r0=r1 +|- r2, r7=r1 -|+ r2;
diff --git a/gold/ChangeLog b/gold/ChangeLog
index 4ecc6b88171..c9530316989 100644
--- a/gold/ChangeLog
+++ b/gold/ChangeLog
@@ -1,3 +1,7 @@
+2016-12-21  Alan Modra  <amodra@gmail.com>
+
+	* arm.cc: Fix comment chars with high bit set.
+
 2016-12-20  Cary Coutant  <ccoutant@gmail.com>
 
 	* testsuite/Makefile.am: Add missing dependencies on gcctestdir/ld
diff --git a/gold/arm.cc b/gold/arm.cc
index d1361aa683e..43714a56e6a 100644
--- a/gold/arm.cc
+++ b/gold/arm.cc
@@ -3424,7 +3424,7 @@ class Arm_relocate_functions : public Relocate_functions<32, big_endian>
 	     const Symbol_value<32>* psymval, Arm_address address,
 	     Arm_address thumb_bit);
 
-  // R_ARM_THM_JUMP6: S + A – P
+  // R_ARM_THM_JUMP6: S + A - P
   static inline typename This::Status
   thm_jump6(unsigned char* view,
 	    const Sized_relobj_file<32, big_endian>* object,
@@ -3435,7 +3435,7 @@ class Arm_relocate_functions : public Relocate_functions<32, big_endian>
     typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
     Valtype* wv = reinterpret_cast<Valtype*>(view);
     Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
-    // bit[9]:bit[7:3]:’0’ (mask: 0x02f8)
+    // bit[9]:bit[7:3]:'0' (mask: 0x02f8)
     Reltype addend = (((val & 0x0200) >> 3) | ((val & 0x00f8) >> 2));
     Reltype x = (psymval->value(object, addend) - address);
     val = (val & 0xfd07) | ((x  & 0x0040) << 3) | ((val & 0x003e) << 2);
@@ -3446,7 +3446,7 @@ class Arm_relocate_functions : public Relocate_functions<32, big_endian>
 	    : This::STATUS_OKAY);
   }
 
-  // R_ARM_THM_JUMP8: S + A – P
+  // R_ARM_THM_JUMP8: S + A - P
   static inline typename This::Status
   thm_jump8(unsigned char* view,
 	    const Sized_relobj_file<32, big_endian>* object,
@@ -3466,7 +3466,7 @@ class Arm_relocate_functions : public Relocate_functions<32, big_endian>
 	    : This::STATUS_OKAY);
   }
 
-  // R_ARM_THM_JUMP11: S + A – P
+  // R_ARM_THM_JUMP11: S + A - P
   static inline typename This::Status
   thm_jump11(unsigned char* view,
 	    const Sized_relobj_file<32, big_endian>* object,
diff --git a/include/ChangeLog b/include/ChangeLog
index aeb3797b98c..2f764308d4d 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,8 @@
+2016-12-21  Alan Modra  <amodra@gmail.com>
+
+	* coff/pe.h: Fix comment chars with high bit set.
+	* opcode/xgate.h: Likewise.
+
 2016-12-20  Maciej W. Rozycki  <macro@imgtec.com>
 
 	* opcode/mips.h (mips_opcode_32bit_p): New inline function.
diff --git a/include/coff/pe.h b/include/coff/pe.h
index 85ad5183b69..fd96fd43629 100644
--- a/include/coff/pe.h
+++ b/include/coff/pe.h
@@ -604,7 +604,7 @@ struct external_IMAGE_DEBUG_DIRECTORY
 #define CVINFO_PDB70_CVSIGNATURE 0x53445352 // "RSDS"
 #define CVINFO_PDB20_CVSIGNATURE 0x3031424e // "NB10"
 #define CVINFO_CV50_CVSIGNATURE  0x3131424e // "NB11"
-#define CVINFO_CV41_CVSIGNATURE  0x3930424e // âNB09"
+#define CVINFO_CV41_CVSIGNATURE  0x3930424e // "NB09"
 
 typedef struct _CV_INFO_PDB70
 {
diff --git a/include/opcode/xgate.h b/include/opcode/xgate.h
index 737c0d9e834..ad4dbb14871 100644
--- a/include/opcode/xgate.h
+++ b/include/opcode/xgate.h
@@ -29,14 +29,14 @@
 #define XGATE_C_BIT   0x01	/* XGC - Carry Flag */
 
 /* Access Detail Notation
-   V — Vector fetch: always an aligned word read, lasts for at least one RISC core cycle
-   P — Program word fetch: always an aligned word read, lasts for at least one RISC core cycle
-   r — 8-bit data read: lasts for at least one RISC core cycle
-   R — 16-bit data read: lasts for at least one RISC core cycle
-   w — 8-bit data write: lasts for at least one RISC core cycle
-   W — 16-bit data write: lasts for at least one RISC core cycle
-   A — Alignment cycle: no read or write, lasts for zero or one RISC core cycles
-   f — Free cycle: no read or write, lasts for one RISC core cycles.  */
+   V - Vector fetch: always an aligned word read, lasts for at least one RISC core cycle
+   P - Program word fetch: always an aligned word read, lasts for at least one RISC core cycle
+   r - 8-bit data read: lasts for at least one RISC core cycle
+   R - 16-bit data read: lasts for at least one RISC core cycle
+   w - 8-bit data write: lasts for at least one RISC core cycle
+   W - 16-bit data write: lasts for at least one RISC core cycle
+   A - Alignment cycle: no read or write, lasts for zero or one RISC core cycles
+   f - Free cycle: no read or write, lasts for one RISC core cycles.  */
 #define XGATE_CYCLE_V	0x01
 #define XGATE_CYCLE_P	0x02
 #define XGATE_CYCLE_r	0x04
diff --git a/ld/ChangeLog b/ld/ChangeLog
index 8463c7c23b9..f8c66e4c36a 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,7 @@
+2016-12-21  Alan Modra  <amodra@gmail.com>
+
+	* testsuite/ld-scripts/sysroot-prefix.exp: Fix chars with high bit set.
+
 2016-12-16  fincs  <fincs.alt1@gmail.com>
 
 	* ld.texinfo: Document --gc-keep-exported.
diff --git a/ld/testsuite/ld-scripts/sysroot-prefix.exp b/ld/testsuite/ld-scripts/sysroot-prefix.exp
index 91fee0e3f7b..47d065772be 100644
--- a/ld/testsuite/ld-scripts/sysroot-prefix.exp
+++ b/ld/testsuite/ld-scripts/sysroot-prefix.exp
@@ -81,7 +81,7 @@ proc sysroot_prefix_test_setup { } {
     global as gasopt srcdir subdir ar
 
     if {![ld_assemble_flags $as $gasopt $srcdir/$subdir/pr14962a.s tmpdir/main.o]} {
-	error "Error assembling a trivial file for sysroot-prefix tests framework"
+	error "Error assembling a trivial file for sysroot-prefix tests framework"
 	return 0
     }
 
@@ -106,13 +106,13 @@ proc sysroot_prefix_test_setup { } {
 	set libnamebase [lindex $test_object 2]
 
 	if ![ld_assemble_flags $as $gasopt $srcdir/$subdir/$sname $oname] {
-	    error "Error assembling trivial file $sname for sysroot-prefix tests framework"
+	    error "Error assembling trivial file $sname for sysroot-prefix tests framework"
 	    return 0
 	}
 
 	if { [string length $libnamebase] != 0 &&
 	     ![ar_simple_create $ar "" tmpdir/sysroot/tmp/ldtest-xyzzy/lib$libnamebase.a $oname] } {
-	    error "Error creating archive $libnamebase for sysroot-prefix tests framework"
+	    error "Error creating archive $libnamebase for sysroot-prefix tests framework"
 	    return 0
 	}
     }