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path: root/target-mips/cpu.h
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* target-mips: optimize gen_compute_branch()aurel322009-03-291-1/+1
* target-mips: rename helpers from do_ to helper_aurel322009-03-081-8/+8
* The _exit syscall is used for both thread termination in NPTL applications,pbrook2009-03-071-1/+2
* Fix remaining compiler warnings for mips targets.ths2008-12-201-1/+18
* Refactor translation block CPU state handling (Jan Kiszka)aliguori2008-11-181-0/+8
* Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)aliguori2008-11-181-5/+7
* target-mips: optimize gen_op_addr_add() (2/2)aurel322008-11-111-6/+7
* Show size for unassigned accesses (Robert Reif)blueswir12008-10-061-1/+1
* Move the active FPU registers into env again, and use more TCG registersths2008-09-181-4/+7
* Less hardcoding of TARGET_USER_ONLY.ths2008-07-231-8/+1
* Use temporary registers for the MIPS FPU emulation.ths2008-07-091-7/+1
* Move interrupt_request and user_mode_only to common cpu state.pbrook2008-07-011-2/+0
* Move CPU save/load registration to common code.pbrook2008-06-301-0/+2
* Add instruction counter.pbrook2008-06-291-0/+6
* More efficient target register / TC accesses.ths2008-06-271-37/+40
* Remove remaining uses of T0 in the MIPS target.ths2008-06-241-3/+0
* T1 is now dead.ths2008-06-241-1/+0
* Move FP TNs to cpu env.ths2008-06-111-5/+6
* Fix typo.pbrook2008-05-301-1/+1
* Move clone() register setup to target specific code. Handle fork-like clone.pbrook2008-05-301-0/+10
* Push common interrupt variables to cpu-defs.h (Glauber Costa)bellard2008-05-291-2/+0
* moved halted field to CPU_COMMONbellard2008-05-281-2/+0
* Honour current_tc for MIPS M{T,F}{HI,LO}, by Richard Sandiford.ths2008-05-281-0/+1
* Use TCG for MIPS GPR moves.ths2008-05-061-0/+1
* Simplify mips branch handling. Retire T2 from use. Use TCG for branches.ths2008-05-041-1/+0
* Make MIPS MT implementation more cache friendly.ths2008-02-121-4/+4
* MIPS COP1X (and related) instructions, by Richard Sandiford.ths2007-12-301-7/+11
* De-cruft exception definitions, and implement nicer debug output.ths2007-12-261-15/+12
* Improved PABITS handling, and config register fixes.ths2007-12-251-0/+2
* added cpu_model parameter to cpu_init()bellard2007-11-101-4/+2
* Move kernel loader parameters from the cpu state to being board specific.ths2007-11-091-5/+0
* Implement missing MIPS supervisor mode bits.ths2007-10-281-10/+16
* Handle IBE on MIPS properly.ths2007-10-201-0/+3
* Replace is_user variable with mmu_idx in softmmu core,j_mayer2007-10-141-0/+11
* Unify '-cpu ?' option.j_mayer2007-10-121-0/+1
* Move get_sp_from_cpustate from cpu.h to target_signal.h.ths2007-09-271-5/+0
* linux-user sigaltstack() syscall, by Thayne Harbaugh.ths2007-09-271-0/+5
* Optimise instructions accessing CP0, by Aurelien Jarno.ths2007-09-251-9/+10
* Per-CPU instruction decoding implementation, by Aurelien Jarno.ths2007-09-241-0/+1
* Partial support for 34K multithreading, not functional yet.ths2007-09-061-41/+198
* Handle MIPS64 SEGBITS value correctly.ths2007-06-231-0/+2
* Move target-specific defines to the target directories.ths2007-06-031-0/+6
* Don't kill the registered irqs on reset.ths2007-05-311-3/+4
* Fix CPU (re-)selection on reset.ths2007-05-301-1/+4
* Fix usermode check, thanks Aurelien Jarno.ths2007-05-291-1/+1
* Don't check the FPU state for each FPU instruction, use hflags toths2007-05-291-3/+5
* Handle PX/UX status flags correctly, by Aurelien Jarno.ths2007-05-281-0/+1
* The 24k wants more watch and srsmap registers.ths2007-05-231-2/+2
* - Move FPU exception handling into helper functions, since they are big.ths2007-05-181-3/+3
* MIPS linux-user update.ths2007-05-131-0/+1