diff options
Diffstat (limited to 'target-ppc')
| -rw-r--r-- | target-ppc/cpu.h | 88 | ||||
| -rw-r--r-- | target-ppc/helper.c | 116 | ||||
| -rw-r--r-- | target-ppc/helper.h | 2 | ||||
| -rw-r--r-- | target-ppc/op_helper.c | 166 | ||||
| -rw-r--r-- | target-ppc/translate.c | 18 | ||||
| -rw-r--r-- | target-ppc/translate_init.c | 78 |
6 files changed, 233 insertions, 235 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 27f523f6f..cd120d03c 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -70,8 +70,8 @@ /*****************************************************************************/ /* MMU model */ -typedef enum powerpc_mmu_t powerpc_mmu_t; -enum powerpc_mmu_t { +typedef enum powerpc_mmu e_powerpc_mmu; +enum powerpc_mmu { POWERPC_MMU_UNKNOWN = 0x00000000, /* Standard 32 bits PowerPC MMU */ POWERPC_MMU_32B = 0x00000001, @@ -104,8 +104,8 @@ enum powerpc_mmu_t { /*****************************************************************************/ /* Exception model */ -typedef enum powerpc_excp_t powerpc_excp_t; -enum powerpc_excp_t { +typedef enum powerpc_excp e_powerpc_excp; +enum powerpc_excp { POWERPC_EXCP_UNKNOWN = 0, /* Standard PowerPC exception model */ POWERPC_EXCP_STD, @@ -258,8 +258,8 @@ enum { /*****************************************************************************/ /* Input pins model */ -typedef enum powerpc_input_t powerpc_input_t; -enum powerpc_input_t { +typedef enum powerpc_input e_powerpc_input; +enum powerpc_input { PPC_FLAGS_INPUT_UNKNOWN = 0, /* PowerPC 6xx bus */ PPC_FLAGS_INPUT_6xx, @@ -278,20 +278,18 @@ enum powerpc_input_t { #define PPC_INPUT(env) (env->bus_model) /*****************************************************************************/ -typedef struct ppc_def_t ppc_def_t; -typedef struct opc_handler_t opc_handler_t; +typedef struct ppc_def a_ppc_def; +typedef struct opc_handler an_opc_handler; /*****************************************************************************/ /* Types used to describe some PowerPC registers */ typedef struct CPUPPCState CPUPPCState; -typedef struct ppc_tb_t ppc_tb_t; -typedef struct ppc_spr_t ppc_spr_t; -typedef struct ppc_dcr_t ppc_dcr_t; -typedef union ppc_avr_t ppc_avr_t; -typedef union ppc_tlb_t ppc_tlb_t; +typedef struct ppc_tb a_ppc_tb; +typedef struct ppc_spr a_ppc_spr; +typedef struct ppc_dcr a_ppc_dcr; /* SPR access micro-ops generations callbacks */ -struct ppc_spr_t { +struct ppc_spr { void (*uea_read)(void *opaque, int gpr_num, int spr_num); void (*uea_write)(void *opaque, int spr_num, int gpr_num); #if !defined(CONFIG_USER_ONLY) @@ -304,7 +302,7 @@ struct ppc_spr_t { }; /* Altivec registers (128 bits) */ -union ppc_avr_t { +union ppc_avr { float32 f[4]; uint8_t u8[16]; uint16_t u16[8]; @@ -316,16 +314,16 @@ union ppc_avr_t { }; /* Software TLB cache */ -typedef struct ppc6xx_tlb_t ppc6xx_tlb_t; -struct ppc6xx_tlb_t { +typedef struct ppc6xx_tlb a_ppc6xx_tlb; +struct ppc6xx_tlb { target_ulong pte0; target_ulong pte1; target_ulong EPN; }; -typedef struct ppcemb_tlb_t ppcemb_tlb_t; -struct ppcemb_tlb_t { - target_phys_addr_t RPN; +typedef struct ppcemb_tlb a_ppcemb_tlb; +struct ppcemb_tlb { + a_target_phys_addr RPN; target_ulong EPN; target_ulong PID; target_ulong size; @@ -333,13 +331,13 @@ struct ppcemb_tlb_t { uint32_t attr; /* Storage attributes */ }; -union ppc_tlb_t { - ppc6xx_tlb_t tlb6; - ppcemb_tlb_t tlbe; +union ppc_tlb { + a_ppc6xx_tlb tlb6; + a_ppcemb_tlb tlbe; }; -typedef struct ppc_slb_t ppc_slb_t; -struct ppc_slb_t { +typedef struct ppc_slb a_ppc_slb; +struct ppc_slb { uint64_t tmp64; uint32_t tmp; }; @@ -590,7 +588,7 @@ struct CPUPPCState { /* Address space register */ target_ulong asr; /* PowerPC 64 SLB area */ - ppc_slb_t slb[64]; + a_ppc_slb slb[64]; int slb_nr; #endif /* segment registers */ @@ -607,7 +605,7 @@ struct CPUPPCState { int last_way; /* Last used way used to allocate TLB in a LRU way */ int id_tlbs; /* If 1, MMU has separated TLBs for instructions & data */ int nb_pids; /* Number of available PID registers */ - ppc_tlb_t *tlb; /* TLB is optional. Allocate them only if needed */ + union ppc_tlb *tlb; /* TLB is optional. Allocate them only if needed */ /* 403 dedicated access protection registers */ target_ulong pb[4]; #endif @@ -615,9 +613,9 @@ struct CPUPPCState { /* Other registers */ /* Special purpose registers */ target_ulong spr[1024]; - ppc_spr_t spr_cb[1024]; + a_ppc_spr spr_cb[1024]; /* Altivec registers */ - ppc_avr_t avr[32]; + union ppc_avr avr[32]; uint32_t vscr; /* SPE registers */ uint64_t spe_acc; @@ -628,9 +626,9 @@ struct CPUPPCState { /* Internal devices resources */ /* Time base and decrementer */ - ppc_tb_t *tb_env; + a_ppc_tb *tb_env; /* Device control registers */ - ppc_dcr_t *dcr_env; + a_ppc_dcr *dcr_env; int dcache_line_size; int icache_line_size; @@ -638,9 +636,9 @@ struct CPUPPCState { /* Those resources are used during exception processing */ /* CPU model definition */ target_ulong msr_mask; - powerpc_mmu_t mmu_model; - powerpc_excp_t excp_model; - powerpc_input_t bus_model; + e_powerpc_mmu mmu_model; + e_powerpc_excp excp_model; + e_powerpc_input bus_model; int bfd_mach; uint32_t flags; uint64_t insns_flags; @@ -667,7 +665,7 @@ struct CPUPPCState { target_ulong nip; /* opcode handlers */ - opc_handler_t *opcodes[0x40]; + an_opc_handler *opcodes[0x40]; /* Those resources are used only in Qemu core */ target_ulong hflags; /* hflags is a MSR & HFLAGS_MASK */ @@ -683,12 +681,12 @@ struct CPUPPCState { }; /* Context used internally during MMU translations */ -typedef struct mmu_ctx_t mmu_ctx_t; -struct mmu_ctx_t { - target_phys_addr_t raddr; /* Real address */ - target_phys_addr_t eaddr; /* Effective address */ +typedef struct mmu_ctx a_mmu_ctx; +struct mmu_ctx { + a_target_phys_addr raddr; /* Real address */ + a_target_phys_addr eaddr; /* Effective address */ int prot; /* Protection bits */ - target_phys_addr_t pg_addr[2]; /* PTE tables base addresses */ + a_target_phys_addr pg_addr[2]; /* PTE tables base addresses */ target_ulong ptem; /* Virtual segment ID | API */ int key; /* Access key */ int nx; /* Non-execute area */ @@ -707,7 +705,7 @@ int cpu_ppc_signal_handler (int host_signum, void *pinfo, int cpu_ppc_handle_mmu_fault (CPUPPCState *env, target_ulong address, int rw, int mmu_idx, int is_softmmu); #define cpu_handle_mmu_fault cpu_ppc_handle_mmu_fault -int get_physical_address (CPUPPCState *env, mmu_ctx_t *ctx, target_ulong vaddr, +int get_physical_address (CPUPPCState *env, a_mmu_ctx *ctx, target_ulong vaddr, int rw, int access_type); void do_interrupt (CPUPPCState *env); void ppc_hw_interrupt (CPUPPCState *env); @@ -738,8 +736,8 @@ void cpu_ppc_reset (void *opaque); void ppc_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...)); -const ppc_def_t *cpu_ppc_find_by_name (const char *name); -int cpu_ppc_register_internal (CPUPPCState *env, const ppc_def_t *def); +const a_ppc_def *cpu_ppc_find_by_name (const char *name); +int cpu_ppc_register_internal (CPUPPCState *env, const a_ppc_def *def); /* Time-base and decrementer management */ #ifndef NO_CPU_IO_DEFS @@ -797,8 +795,8 @@ static inline uint64_t ppc_dump_gpr(CPUPPCState *env, int gprn) } /* Device control registers */ -int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp); -int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val); +int ppc_dcr_read (a_ppc_dcr *dcr_env, int dcrn, target_ulong *valp); +int ppc_dcr_write (a_ppc_dcr *dcr_env, int dcrn, target_ulong val); #define cpu_init cpu_ppc_init #define cpu_exec cpu_ppc_exec diff --git a/target-ppc/helper.c b/target-ppc/helper.c index 5c85c6120..afe538fea 100644 --- a/target-ppc/helper.c +++ b/target-ppc/helper.c @@ -97,7 +97,7 @@ int cpu_ppc_handle_mmu_fault (CPUState *env, target_ulong address, int rw, return 1; } -target_phys_addr_t cpu_get_phys_page_debug (CPUState *env, target_ulong addr) +a_target_phys_addr cpu_get_phys_page_debug (CPUState *env, target_ulong addr) { return addr; } @@ -197,7 +197,7 @@ static inline int check_prot(int prot, int rw, int access_type) return ret; } -static inline int _pte_check(mmu_ctx_t *ctx, int is_64b, target_ulong pte0, +static inline int _pte_check(a_mmu_ctx *ctx, int is_64b, target_ulong pte0, target_ulong pte1, int h, int rw, int type) { target_ulong ptem, mmask; @@ -233,7 +233,7 @@ static inline int _pte_check(mmu_ctx_t *ctx, int is_64b, target_ulong pte0, pp = pte1 & 0x00000003; } if (ptem == ctx->ptem) { - if (ctx->raddr != (target_phys_addr_t)-1ULL) { + if (ctx->raddr != (a_target_phys_addr)-1ULL) { /* all matches should have equal RPN, WIMG & PP */ if ((ctx->raddr & mmask) != (pte1 & mmask)) { qemu_log("Bad RPN/WIMG/PP\n"); @@ -259,21 +259,21 @@ static inline int _pte_check(mmu_ctx_t *ctx, int is_64b, target_ulong pte0, return ret; } -static inline int pte32_check(mmu_ctx_t *ctx, target_ulong pte0, +static inline int pte32_check(a_mmu_ctx *ctx, target_ulong pte0, target_ulong pte1, int h, int rw, int type) { return _pte_check(ctx, 0, pte0, pte1, h, rw, type); } #if defined(TARGET_PPC64) -static inline int pte64_check(mmu_ctx_t *ctx, target_ulong pte0, +static inline int pte64_check(a_mmu_ctx *ctx, target_ulong pte0, target_ulong pte1, int h, int rw, int type) { return _pte_check(ctx, 1, pte0, pte1, h, rw, type); } #endif -static inline int pte_update_flags(mmu_ctx_t *ctx, target_ulong *pte1p, +static inline int pte_update_flags(a_mmu_ctx *ctx, target_ulong *pte1p, int ret, int rw) { int store = 0; @@ -317,7 +317,7 @@ static inline int ppc6xx_tlb_getnum(CPUState *env, target_ulong eaddr, int way, static inline void ppc6xx_tlb_invalidate_all(CPUState *env) { - ppc6xx_tlb_t *tlb; + a_ppc6xx_tlb *tlb; int nr, max; //LOG_SWTLB("Invalidate all TLBs\n"); @@ -337,7 +337,7 @@ static inline void __ppc6xx_tlb_invalidate_virt(CPUState *env, int is_code, int match_epn) { #if !defined(FLUSH_ALL_TLBS) - ppc6xx_tlb_t *tlb; + a_ppc6xx_tlb *tlb; int way, nr; /* Invalidate ITLB + DTLB, all ways */ @@ -366,7 +366,7 @@ static inline void ppc6xx_tlb_invalidate_virt(CPUState *env, void ppc6xx_tlb_store (CPUState *env, target_ulong EPN, int way, int is_code, target_ulong pte0, target_ulong pte1) { - ppc6xx_tlb_t *tlb; + a_ppc6xx_tlb *tlb; int nr; nr = ppc6xx_tlb_getnum(env, EPN, way, is_code); @@ -382,10 +382,10 @@ void ppc6xx_tlb_store (CPUState *env, target_ulong EPN, int way, int is_code, env->last_way = way; } -static inline int ppc6xx_tlb_check(CPUState *env, mmu_ctx_t *ctx, +static inline int ppc6xx_tlb_check(CPUState *env, a_mmu_ctx *ctx, target_ulong eaddr, int rw, int access_type) { - ppc6xx_tlb_t *tlb; + a_ppc6xx_tlb *tlb; int nr, best, way; int ret; @@ -494,7 +494,7 @@ static inline void bat_601_size_prot(CPUState *env, target_ulong *blp, *protp = prot; } -static inline int get_bat(CPUState *env, mmu_ctx_t *ctx, target_ulong virtual, +static inline int get_bat(CPUState *env, a_mmu_ctx *ctx, target_ulong virtual, int rw, int type) { target_ulong *BATlt, *BATut, *BATu, *BATl; @@ -571,7 +571,7 @@ static inline int get_bat(CPUState *env, mmu_ctx_t *ctx, target_ulong virtual, } /* PTE table lookup */ -static inline int _find_pte(mmu_ctx_t *ctx, int is_64b, int h, int rw, +static inline int _find_pte(a_mmu_ctx *ctx, int is_64b, int h, int rw, int type, int target_page_bits) { target_ulong base, pte0, pte1; @@ -653,21 +653,21 @@ static inline int _find_pte(mmu_ctx_t *ctx, int is_64b, int h, int rw, return ret; } -static inline int find_pte32(mmu_ctx_t *ctx, int h, int rw, int type, +static inline int find_pte32(a_mmu_ctx *ctx, int h, int rw, int type, int target_page_bits) { return _find_pte(ctx, 0, h, rw, type, target_page_bits); } #if defined(TARGET_PPC64) -static inline int find_pte64(mmu_ctx_t *ctx, int h, int rw, int type, +static inline int find_pte64(a_mmu_ctx *ctx, int h, int rw, int type, int target_page_bits) { return _find_pte(ctx, 1, h, rw, type, target_page_bits); } #endif -static inline int find_pte(CPUState *env, mmu_ctx_t *ctx, int h, int rw, +static inline int find_pte(CPUState *env, a_mmu_ctx *ctx, int h, int rw, int type, int target_page_bits) { #if defined(TARGET_PPC64) @@ -679,13 +679,13 @@ static inline int find_pte(CPUState *env, mmu_ctx_t *ctx, int h, int rw, } #if defined(TARGET_PPC64) -static ppc_slb_t *slb_get_entry(CPUPPCState *env, int nr) +static a_ppc_slb *slb_get_entry(CPUPPCState *env, int nr) { - ppc_slb_t *retval = &env->slb[nr]; + a_ppc_slb *retval = &env->slb[nr]; #if 0 // XXX implement bridge mode? if (env->spr[SPR_ASR] & 1) { - target_phys_addr_t sr_base; + a_target_phys_addr sr_base; sr_base = env->spr[SPR_ASR] & 0xfffffffffffff000; sr_base += (12 * nr); @@ -698,9 +698,9 @@ static ppc_slb_t *slb_get_entry(CPUPPCState *env, int nr) return retval; } -static void slb_set_entry(CPUPPCState *env, int nr, ppc_slb_t *slb) +static void slb_set_entry(CPUPPCState *env, int nr, a_ppc_slb *slb) { - ppc_slb_t *entry = &env->slb[nr]; + a_ppc_slb *entry = &env->slb[nr]; if (slb == entry) return; @@ -709,12 +709,12 @@ static void slb_set_entry(CPUPPCState *env, int nr, ppc_slb_t *slb) entry->tmp = slb->tmp; } -static inline int slb_is_valid(ppc_slb_t *slb) +static inline int slb_is_valid(a_ppc_slb *slb) { return (int)(slb->tmp64 & 0x0000000008000000ULL); } -static inline void slb_invalidate(ppc_slb_t *slb) +static inline void slb_invalidate(a_ppc_slb *slb) { slb->tmp64 &= ~0x0000000008000000ULL; } @@ -730,7 +730,7 @@ static inline int slb_lookup(CPUPPCState *env, target_ulong eaddr, LOG_SLB("%s: eaddr " TARGET_FMT_lx "\n", __func__, eaddr); mask = 0x0000000000000000ULL; /* Avoid gcc warning */ for (n = 0; n < env->slb_nr; n++) { - ppc_slb_t *slb = slb_get_entry(env, n); + a_ppc_slb *slb = slb_get_entry(env, n); LOG_SLB("%s: seg %d %016" PRIx64 " %08" PRIx32 "\n", __func__, n, slb->tmp64, slb->tmp); @@ -768,7 +768,7 @@ void ppc_slb_invalidate_all (CPUPPCState *env) do_invalidate = 0; /* XXX: Warning: slbia never invalidates the first segment */ for (n = 1; n < env->slb_nr; n++) { - ppc_slb_t *slb = slb_get_entry(env, n); + a_ppc_slb *slb = slb_get_entry(env, n); if (slb_is_valid(slb)) { slb_invalidate(slb); @@ -792,7 +792,7 @@ void ppc_slb_invalidate_one (CPUPPCState *env, uint64_t T0) n = slb_lookup(env, T0, &vsid, &page_mask, &attr, NULL); if (n >= 0) { - ppc_slb_t *slb = slb_get_entry(env, n); + a_ppc_slb *slb = slb_get_entry(env, n); if (slb_is_valid(slb)) { slb_invalidate(slb); @@ -809,7 +809,7 @@ void ppc_slb_invalidate_one (CPUPPCState *env, uint64_t T0) target_ulong ppc_load_slb (CPUPPCState *env, int slb_nr) { target_ulong rt; - ppc_slb_t *slb = slb_get_entry(env, slb_nr); + a_ppc_slb *slb = slb_get_entry(env, slb_nr); if (slb_is_valid(slb)) { /* SLB entry is valid */ @@ -829,7 +829,7 @@ target_ulong ppc_load_slb (CPUPPCState *env, int slb_nr) void ppc_store_slb (CPUPPCState *env, target_ulong rb, target_ulong rs) { - ppc_slb_t *slb; + a_ppc_slb *slb; uint64_t vsid; uint64_t esid; @@ -855,18 +855,18 @@ void ppc_store_slb (CPUPPCState *env, target_ulong rb, target_ulong rs) #endif /* defined(TARGET_PPC64) */ /* Perform segment based translation */ -static inline target_phys_addr_t get_pgaddr(target_phys_addr_t sdr1, +static inline a_target_phys_addr get_pgaddr(a_target_phys_addr sdr1, int sdr_sh, - target_phys_addr_t hash, - target_phys_addr_t mask) + a_target_phys_addr hash, + a_target_phys_addr mask) { - return (sdr1 & ((target_phys_addr_t)(-1ULL) << sdr_sh)) | (hash & mask); + return (sdr1 & ((a_target_phys_addr)(-1ULL) << sdr_sh)) | (hash & mask); } -static inline int get_segment(CPUState *env, mmu_ctx_t *ctx, +static inline int get_segment(CPUState *env, a_mmu_ctx *ctx, target_ulong eaddr, int rw, int type) { - target_phys_addr_t sdr, hash, mask, sdr_mask, htab_mask; + a_target_phys_addr sdr, hash, mask, sdr_mask, htab_mask; target_ulong sr, vsid, vsid_mask, pgidx, page_mask; #if defined(TARGET_PPC64) int attr; @@ -958,7 +958,7 @@ static inline int get_segment(CPUState *env, mmu_ctx_t *ctx, ctx->ptem = (vsid << 7) | (pgidx >> 10); } /* Initialize real address with an invalid value */ - ctx->raddr = (target_phys_addr_t)-1ULL; + ctx->raddr = (a_target_phys_addr)-1ULL; if (unlikely(env->mmu_model == POWERPC_MMU_SOFT_6xx || env->mmu_model == POWERPC_MMU_SOFT_74xx)) { /* Software TLB search */ @@ -985,7 +985,7 @@ static inline int get_segment(CPUState *env, mmu_ctx_t *ctx, } #if defined (DUMP_PAGE_TABLES) if (qemu_log_enabled()) { - target_phys_addr_t curaddr; + a_target_phys_addr curaddr; uint32_t a0, a1, a2, a3; qemu_log("Page table: " TARGET_FMT_plx " len " TARGET_FMT_plx "\n", sdr, mask + 0x80); @@ -1049,8 +1049,8 @@ static inline int get_segment(CPUState *env, mmu_ctx_t *ctx, } /* Generic TLB check function for embedded PowerPC implementations */ -static inline int ppcemb_tlb_check(CPUState *env, ppcemb_tlb_t *tlb, - target_phys_addr_t *raddrp, +static inline int ppcemb_tlb_check(CPUState *env, a_ppcemb_tlb *tlb, + a_target_phys_addr *raddrp, target_ulong address, uint32_t pid, int ext, int i) { @@ -1075,7 +1075,7 @@ static inline int ppcemb_tlb_check(CPUState *env, ppcemb_tlb_t *tlb, #if (TARGET_PHYS_ADDR_BITS >= 36) if (ext) { /* Extend the physical address to 36 bits */ - *raddrp |= (target_phys_addr_t)(tlb->RPN & 0xF) << 32; + *raddrp |= (a_target_phys_addr)(tlb->RPN & 0xF) << 32; } #endif @@ -1085,8 +1085,8 @@ static inline int ppcemb_tlb_check(CPUState *env, ppcemb_tlb_t *tlb, /* Generic TLB search function for PowerPC embedded implementations */ int ppcemb_tlb_search (CPUPPCState *env, target_ulong address, uint32_t pid) { - ppcemb_tlb_t *tlb; - target_phys_addr_t raddr; + a_ppcemb_tlb *tlb; + a_target_phys_addr raddr; int i, ret; /* Default return value is no match */ @@ -1105,7 +1105,7 @@ int ppcemb_tlb_search (CPUPPCState *env, target_ulong address, uint32_t pid) /* Helpers specific to PowerPC 40x implementations */ static inline void ppc4xx_tlb_invalidate_all(CPUState *env) { - ppcemb_tlb_t *tlb; + a_ppcemb_tlb *tlb; int i; for (i = 0; i < env->nb_tlb; i++) { @@ -1119,8 +1119,8 @@ static inline void ppc4xx_tlb_invalidate_virt(CPUState *env, target_ulong eaddr, uint32_t pid) { #if !defined(FLUSH_ALL_TLBS) - ppcemb_tlb_t *tlb; - target_phys_addr_t raddr; + a_ppcemb_tlb *tlb; + a_target_phys_addr raddr; target_ulong page, end; int i; @@ -1139,15 +1139,15 @@ static inline void ppc4xx_tlb_invalidate_virt(CPUState *env, #endif } -static int mmu40x_get_physical_address (CPUState *env, mmu_ctx_t *ctx, +static int mmu40x_get_physical_address (CPUState *env, a_mmu_ctx *ctx, target_ulong address, int rw, int access_type) { - ppcemb_tlb_t *tlb; - target_phys_addr_t raddr; + a_ppcemb_tlb *tlb; + a_target_phys_addr raddr; int i, ret, zsel, zpr, pr; ret = -1; - raddr = (target_phys_addr_t)-1ULL; + raddr = (a_target_phys_addr)-1ULL; pr = msr_pr; for (i = 0; i < env->nb_tlb; i++) { tlb = &env->tlb[i].tlbe; @@ -1208,16 +1208,16 @@ void store_40x_sler (CPUPPCState *env, uint32_t val) env->spr[SPR_405_SLER] = val; } -static int mmubooke_get_physical_address (CPUState *env, mmu_ctx_t *ctx, +static int mmubooke_get_physical_address (CPUState *env, a_mmu_ctx *ctx, target_ulong address, int rw, int access_type) { - ppcemb_tlb_t *tlb; - target_phys_addr_t raddr; + a_ppcemb_tlb *tlb; + a_target_phys_addr raddr; int i, prot, ret; ret = -1; - raddr = (target_phys_addr_t)-1ULL; + raddr = (a_target_phys_addr)-1ULL; for (i = 0; i < env->nb_tlb; i++) { tlb = &env->tlb[i].tlbe; if (ppcemb_tlb_check(env, tlb, &raddr, address, @@ -1254,7 +1254,7 @@ static int mmubooke_get_physical_address (CPUState *env, mmu_ctx_t *ctx, return ret; } -static inline int check_physical(CPUState *env, mmu_ctx_t *ctx, +static inline int check_physical(CPUState *env, a_mmu_ctx *ctx, target_ulong eaddr, int rw) { int in_plb, ret; @@ -1320,7 +1320,7 @@ static inline int check_physical(CPUState *env, mmu_ctx_t *ctx, return ret; } -int get_physical_address (CPUState *env, mmu_ctx_t *ctx, target_ulong eaddr, +int get_physical_address (CPUState *env, a_mmu_ctx *ctx, target_ulong eaddr, int rw, int access_type) { int ret; @@ -1384,9 +1384,9 @@ int get_physical_address (CPUState *env, mmu_ctx_t *ctx, target_ulong eaddr, return ret; } -target_phys_addr_t cpu_get_phys_page_debug (CPUState *env, target_ulong addr) +a_target_phys_addr cpu_get_phys_page_debug (CPUState *env, target_ulong addr) { - mmu_ctx_t ctx; + a_mmu_ctx ctx; if (unlikely(get_physical_address(env, &ctx, addr, 0, ACCESS_INT) != 0)) return -1; @@ -1398,7 +1398,7 @@ target_phys_addr_t cpu_get_phys_page_debug (CPUState *env, target_ulong addr) int cpu_ppc_handle_mmu_fault (CPUState *env, target_ulong address, int rw, int mmu_idx, int is_softmmu) { - mmu_ctx_t ctx; + a_mmu_ctx ctx; int access_type; int ret = 0; @@ -2800,7 +2800,7 @@ void cpu_ppc_reset (void *opaque) CPUPPCState *cpu_ppc_init (const char *cpu_model) { CPUPPCState *env; - const ppc_def_t *def; + const a_ppc_def *def; def = cpu_ppc_find_by_name(cpu_model); if (!def) diff --git a/target-ppc/helper.h b/target-ppc/helper.h index 5cf6cd450..ad5d075e0 100644 --- a/target-ppc/helper.h +++ b/target-ppc/helper.h @@ -94,7 +94,7 @@ DEF_HELPER_1(frsqrte, i64, i64) DEF_HELPER_3(fsel, i64, i64, i64, i64) #define dh_alias_avr ptr -#define dh_ctype_avr ppc_avr_t * +#define dh_ctype_avr union ppc_avr * DEF_HELPER_3(vaddubm, void, avr, avr, avr) DEF_HELPER_3(vadduhm, void, avr, avr, avr) diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c index e3bd29cc1..e6cec7649 100644 --- a/target-ppc/op_helper.c +++ b/target-ppc/op_helper.c @@ -1782,7 +1782,7 @@ target_ulong helper_divso (target_ulong arg1, target_ulong arg2) #if !defined (CONFIG_USER_ONLY) target_ulong helper_rac (target_ulong addr) { - mmu_ctx_t ctx; + a_mmu_ctx ctx; int nb_BATs; target_ulong ret = 0; @@ -1996,7 +1996,7 @@ SATCVT(sd, uw, int64_t, uint32_t, 0, UINT32_MAX, 1, 1) #undef SATCVT #define LVE(name, access, swap, element) \ - void helper_##name (ppc_avr_t *r, target_ulong addr) \ + void helper_##name (union ppc_avr *r, target_ulong addr) \ { \ size_t n_elems = ARRAY_SIZE(r->element); \ int adjust = HI_IDX*(n_elems-1); \ @@ -2015,7 +2015,7 @@ LVE(lvewx, ldl, bswap32, u32) #undef I #undef LVE -void helper_lvsl (ppc_avr_t *r, target_ulong sh) +void helper_lvsl (union ppc_avr *r, target_ulong sh) { int i, j = (sh & 0xf); @@ -2024,7 +2024,7 @@ void helper_lvsl (ppc_avr_t *r, target_ulong sh) } } -void helper_lvsr (ppc_avr_t *r, target_ulong sh) +void helper_lvsr (union ppc_avr *r, target_ulong sh) { int i, j = 0x10 - (sh & 0xf); @@ -2034,7 +2034,7 @@ void helper_lvsr (ppc_avr_t *r, target_ulong sh) } #define STVE(name, access, swap, element) \ - void helper_##name (ppc_avr_t *r, target_ulong addr) \ + void helper_##name (union ppc_avr *r, target_ulong addr) \ { \ size_t n_elems = ARRAY_SIZE(r->element); \ int adjust = HI_IDX*(n_elems-1); \ @@ -2053,7 +2053,7 @@ STVE(stvewx, stl, bswap32, u32) #undef I #undef LVE -void helper_mtvscr (ppc_avr_t *r) +void helper_mtvscr (union ppc_avr *r) { #if defined(HOST_WORDS_BIGENDIAN) env->vscr = r->u32[3]; @@ -2063,7 +2063,7 @@ void helper_mtvscr (ppc_avr_t *r) set_flush_to_zero(vscr_nj, &env->vec_status); } -void helper_vaddcuw (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +void helper_vaddcuw (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b) { int i; for (i = 0; i < ARRAY_SIZE(r->u32); i++) { @@ -2071,13 +2071,13 @@ void helper_vaddcuw (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) } } -#define VARITH_DO(name, op, element) \ -void helper_v##name (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ -{ \ - int i; \ - for (i = 0; i < ARRAY_SIZE(r->element); i++) { \ - r->element[i] = a->element[i] op b->element[i]; \ - } \ +#define VARITH_DO(name, op, element) \ +void helper_v##name (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b) \ +{ \ + int i; \ + for (i = 0; i < ARRAY_SIZE(r->element); i++) { \ + r->element[i] = a->element[i] op b->element[i]; \ + } \ } #define VARITH(suffix, element) \ VARITH_DO(add##suffix, +, element) \ @@ -2089,7 +2089,7 @@ VARITH(uwm, u32) #undef VARITH #define VARITHFP(suffix, func) \ - void helper_v##suffix (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ + void helper_v##suffix (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b)\ { \ int i; \ for (i = 0; i < ARRAY_SIZE(r->f); i++) { \ @@ -2109,7 +2109,7 @@ VARITHFP(subfp, float32_sub) } #define VARITHSAT_DO(name, op, optype, cvt, element) \ - void helper_v##name (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ + void helper_v##name (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b) \ { \ int sat = 0; \ int i; \ @@ -2142,7 +2142,7 @@ VARITHSAT_UNSIGNED(w, u32, uint64_t, cvtsduw) #undef VARITHSAT_UNSIGNED #define VAVG_DO(name, element, etype) \ - void helper_v##name (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ + void helper_v##name (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b)\ { \ int i; \ for (i = 0; i < ARRAY_SIZE(r->element); i++) { \ @@ -2161,7 +2161,7 @@ VAVG(w, s32, int64_t, u32, uint64_t) #undef VAVG #define VCF(suffix, cvt, element) \ - void helper_vcf##suffix (ppc_avr_t *r, ppc_avr_t *b, uint32_t uim) \ + void helper_vcf##suffix (union ppc_avr *r, union ppc_avr *b, uint32_t uim) \ { \ int i; \ for (i = 0; i < ARRAY_SIZE(r->f); i++) { \ @@ -2174,7 +2174,7 @@ VCF(sx, int32_to_float32, s32) #undef VCF #define VCMP_DO(suffix, compare, element, record) \ - void helper_vcmp##suffix (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ + void helper_vcmp##suffix (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b) \ { \ uint32_t ones = (uint32_t)-1; \ uint32_t all = ones; \ @@ -2210,7 +2210,7 @@ VCMP(gtsw, >, s32) #undef VCMP #define VCMPFP_DO(suffix, compare, order, record) \ - void helper_vcmp##suffix (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ + void helper_vcmp##suffix (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b) \ { \ uint32_t ones = (uint32_t)-1; \ uint32_t all = ones; \ @@ -2243,7 +2243,7 @@ VCMPFP(gtfp, ==, float_relation_greater) #undef VCMPFP_DO #undef VCMPFP -static inline void vcmpbfp_internal(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, +static inline void vcmpbfp_internal(union ppc_avr *r, union ppc_avr *a, union ppc_avr *b, int record) { int i; @@ -2267,18 +2267,18 @@ static inline void vcmpbfp_internal(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, } } -void helper_vcmpbfp (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +void helper_vcmpbfp (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b) { vcmpbfp_internal(r, a, b, 0); } -void helper_vcmpbfp_dot (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +void helper_vcmpbfp_dot (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b) { vcmpbfp_internal(r, a, b, 1); } #define VCT(suffix, satcvt, element) \ - void helper_vct##suffix (ppc_avr_t *r, ppc_avr_t *b, uint32_t uim) \ + void helper_vct##suffix (union ppc_avr *r, union ppc_avr *b, uint32_t uim) \ { \ int i; \ int sat = 0; \ @@ -2304,7 +2304,7 @@ VCT(uxs, cvtsduw, u32) VCT(sxs, cvtsdsw, s32) #undef VCT -void helper_vmaddfp (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) +void helper_vmaddfp (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b, union ppc_avr *c) { int i; for (i = 0; i < ARRAY_SIZE(r->f); i++) { @@ -2322,7 +2322,7 @@ void helper_vmaddfp (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) } } -void helper_vmhaddshs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) +void helper_vmhaddshs (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b, union ppc_avr *c) { int sat = 0; int i; @@ -2338,7 +2338,7 @@ void helper_vmhaddshs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) } } -void helper_vmhraddshs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) +void helper_vmhraddshs (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b, union ppc_avr *c) { int sat = 0; int i; @@ -2355,7 +2355,7 @@ void helper_vmhraddshs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) } #define VMINMAX_DO(name, compare, element) \ - void helper_v##name (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ + void helper_v##name (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b) \ { \ int i; \ for (i = 0; i < ARRAY_SIZE(r->element); i++) { \ @@ -2379,7 +2379,7 @@ VMINMAX(uw, u32) #undef VMINMAX #define VMINMAXFP(suffix, rT, rF) \ - void helper_v##suffix (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ + void helper_v##suffix (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b) \ { \ int i; \ for (i = 0; i < ARRAY_SIZE(r->f); i++) { \ @@ -2396,7 +2396,7 @@ VMINMAXFP(minfp, a, b) VMINMAXFP(maxfp, b, a) #undef VMINMAXFP -void helper_vmladduhm (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) +void helper_vmladduhm (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b, union ppc_avr *c) { int i; for (i = 0; i < ARRAY_SIZE(r->s16); i++) { @@ -2406,9 +2406,9 @@ void helper_vmladduhm (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) } #define VMRG_DO(name, element, highp) \ - void helper_v##name (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ + void helper_v##name (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b) \ { \ - ppc_avr_t result; \ + union ppc_avr result; \ int i; \ size_t n_elems = ARRAY_SIZE(r->element); \ for (i = 0; i < n_elems/2; i++) { \ @@ -2440,7 +2440,7 @@ VMRG(w, u32) #undef MRGHI #undef MRGLO -void helper_vmsummbm (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) +void helper_vmsummbm (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b, union ppc_avr *c) { int32_t prod[16]; int i; @@ -2454,7 +2454,7 @@ void helper_vmsummbm (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) } } -void helper_vmsumshm (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) +void helper_vmsumshm (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b, union ppc_avr *c) { int32_t prod[8]; int i; @@ -2468,7 +2468,7 @@ void helper_vmsumshm (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) } } -void helper_vmsumshs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) +void helper_vmsumshs (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b, union ppc_avr *c) { int32_t prod[8]; int i; @@ -2488,7 +2488,7 @@ void helper_vmsumshs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) } } -void helper_vmsumubm (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) +void helper_vmsumubm (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b, union ppc_avr *c) { uint16_t prod[16]; int i; @@ -2502,7 +2502,7 @@ void helper_vmsumubm (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) } } -void helper_vmsumuhm (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) +void helper_vmsumuhm (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b, union ppc_avr *c) { uint32_t prod[8]; int i; @@ -2516,7 +2516,7 @@ void helper_vmsumuhm (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) } } -void helper_vmsumuhs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) +void helper_vmsumuhs (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b, union ppc_avr *c) { uint32_t prod[8]; int i; @@ -2537,7 +2537,7 @@ void helper_vmsumuhs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) } #define VMUL_DO(name, mul_element, prod_element, evenp) \ - void helper_v##name (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ + void helper_v##name (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b) \ { \ int i; \ VECTOR_FOR_INORDER_I(i, prod_element) { \ @@ -2558,7 +2558,7 @@ VMUL(uh, u16, u32) #undef VMUL_DO #undef VMUL -void helper_vnmsubfp (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) +void helper_vnmsubfp (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b, union ppc_avr *c) { int i; for (i = 0; i < ARRAY_SIZE(r->f); i++) { @@ -2577,9 +2577,9 @@ void helper_vnmsubfp (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) } } -void helper_vperm (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) +void helper_vperm (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b, union ppc_avr *c) { - ppc_avr_t result; + union ppc_avr result; int i; VECTOR_FOR_INORDER_I (i, u8) { int s = c->u8[i] & 0x1f; @@ -2602,14 +2602,14 @@ void helper_vperm (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) #else #define PKBIG 0 #endif -void helper_vpkpx (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +void helper_vpkpx (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b) { int i, j; - ppc_avr_t result; + union ppc_avr result; #if defined(HOST_WORDS_BIGENDIAN) - const ppc_avr_t *x[2] = { a, b }; + const union ppc_avr *x[2] = { a, b }; #else - const ppc_avr_t *x[2] = { b, a }; + const union ppc_avr *x[2] = { b, a }; #endif VECTOR_FOR_INORDER_I (i, u64) { @@ -2624,13 +2624,13 @@ void helper_vpkpx (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) } #define VPK(suffix, from, to, cvt, dosat) \ - void helper_vpk##suffix (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ + void helper_vpk##suffix (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b) \ { \ int i; \ int sat = 0; \ - ppc_avr_t result; \ - ppc_avr_t *a0 = PKBIG ? a : b; \ - ppc_avr_t *a1 = PKBIG ? b : a; \ + union ppc_avr result; \ + union ppc_avr *a0 = PKBIG ? a : b; \ + union ppc_avr *a1 = PKBIG ? b : a; \ VECTOR_FOR_INORDER_I (i, from) { \ result.to[i] = cvt(a0->from[i], &sat); \ result.to[i+ARRAY_SIZE(r->from)] = cvt(a1->from[i], &sat); \ @@ -2653,7 +2653,7 @@ VPK(uwum, u32, u16, I, 0) #undef VPK #undef PKBIG -void helper_vrefp (ppc_avr_t *r, ppc_avr_t *b) +void helper_vrefp (union ppc_avr *r, union ppc_avr *b) { int i; for (i = 0; i < ARRAY_SIZE(r->f); i++) { @@ -2664,7 +2664,7 @@ void helper_vrefp (ppc_avr_t *r, ppc_avr_t *b) } #define VRFI(suffix, rounding) \ - void helper_vrfi##suffix (ppc_avr_t *r, ppc_avr_t *b) \ + void helper_vrfi##suffix (union ppc_avr *r, union ppc_avr *b) \ { \ int i; \ float_status s = env->vec_status; \ @@ -2682,7 +2682,7 @@ VRFI(z, float_round_to_zero) #undef VRFI #define VROTATE(suffix, element) \ - void helper_vrl##suffix (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ + void helper_vrl##suffix (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b) \ { \ int i; \ for (i = 0; i < ARRAY_SIZE(r->element); i++) { \ @@ -2696,7 +2696,7 @@ VROTATE(h, u16) VROTATE(w, u32) #undef VROTATE -void helper_vrsqrtefp (ppc_avr_t *r, ppc_avr_t *b) +void helper_vrsqrtefp (union ppc_avr *r, union ppc_avr *b) { int i; for (i = 0; i < ARRAY_SIZE(r->f); i++) { @@ -2707,13 +2707,13 @@ void helper_vrsqrtefp (ppc_avr_t *r, ppc_avr_t *b) } } -void helper_vsel (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) +void helper_vsel (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b, union ppc_avr *c) { r->u64[0] = (a->u64[0] & ~c->u64[0]) | (b->u64[0] & c->u64[0]); r->u64[1] = (a->u64[1] & ~c->u64[1]) | (b->u64[1] & c->u64[1]); } -void helper_vlogefp (ppc_avr_t *r, ppc_avr_t *b) +void helper_vlogefp (union ppc_avr *r, union ppc_avr *b) { int i; for (i = 0; i < ARRAY_SIZE(r->f); i++) { @@ -2734,7 +2734,7 @@ void helper_vlogefp (ppc_avr_t *r, ppc_avr_t *b) * shift counts are not identical. We check to make sure that they are * to conform to what real hardware appears to do. */ #define VSHIFT(suffix, leftp) \ - void helper_vs##suffix (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ + void helper_vs##suffix (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b) \ { \ int shift = b->u8[LO_IDX*15] & 0x7; \ int doit = 1; \ @@ -2763,7 +2763,7 @@ VSHIFT(r, RIGHT) #undef RIGHT #define VSL(suffix, element) \ - void helper_vsl##suffix (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ + void helper_vsl##suffix (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b) \ { \ int i; \ for (i = 0; i < ARRAY_SIZE(r->element); i++) { \ @@ -2777,11 +2777,11 @@ VSL(h, u16) VSL(w, u32) #undef VSL -void helper_vsldoi (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, uint32_t shift) +void helper_vsldoi (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b, uint32_t shift) { int sh = shift & 0xf; int i; - ppc_avr_t result; + union ppc_avr result; #if defined(HOST_WORDS_BIGENDIAN) for (i = 0; i < ARRAY_SIZE(r->u8); i++) { @@ -2805,7 +2805,7 @@ void helper_vsldoi (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, uint32_t shift) *r = result; } -void helper_vslo (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +void helper_vslo (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b) { int sh = (b->u8[LO_IDX*0xf] >> 3) & 0xf; @@ -2826,7 +2826,7 @@ void helper_vslo (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) #define SPLAT_ELEMENT(element) (ARRAY_SIZE(r->element)-1 - _SPLAT_MASKED(element)) #endif #define VSPLT(suffix, element) \ - void helper_vsplt##suffix (ppc_avr_t *r, ppc_avr_t *b, uint32_t splat) \ + void helper_vsplt##suffix (union ppc_avr *r, union ppc_avr *b, uint32_t splat) \ { \ uint32_t s = b->element[SPLAT_ELEMENT(element)]; \ int i; \ @@ -2842,7 +2842,7 @@ VSPLT(w, u32) #undef _SPLAT_MASKED #define VSPLTI(suffix, element, splat_type) \ - void helper_vspltis##suffix (ppc_avr_t *r, uint32_t splat) \ + void helper_vspltis##suffix (union ppc_avr *r, uint32_t splat) \ { \ splat_type x = (int8_t)(splat << 3) >> 3; \ int i; \ @@ -2856,7 +2856,7 @@ VSPLTI(w, s32, int32_t) #undef VSPLTI #define VSR(suffix, element) \ - void helper_vsr##suffix (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ + void helper_vsr##suffix (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b) \ { \ int i; \ for (i = 0; i < ARRAY_SIZE(r->element); i++) { \ @@ -2873,7 +2873,7 @@ VSR(h, u16) VSR(w, u32) #undef VSR -void helper_vsro (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +void helper_vsro (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b) { int sh = (b->u8[LO_IDX*0xf] >> 3) & 0xf; @@ -2886,7 +2886,7 @@ void helper_vsro (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) #endif } -void helper_vsubcuw (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +void helper_vsubcuw (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b) { int i; for (i = 0; i < ARRAY_SIZE(r->u32); i++) { @@ -2894,11 +2894,11 @@ void helper_vsubcuw (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) } } -void helper_vsumsws (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +void helper_vsumsws (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b) { int64_t t; int i, upper; - ppc_avr_t result; + union ppc_avr result; int sat = 0; #if defined(HOST_WORDS_BIGENDIAN) @@ -2919,10 +2919,10 @@ void helper_vsumsws (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) } } -void helper_vsum2sws (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +void helper_vsum2sws (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b) { int i, j, upper; - ppc_avr_t result; + union ppc_avr result; int sat = 0; #if defined(HOST_WORDS_BIGENDIAN) @@ -2945,7 +2945,7 @@ void helper_vsum2sws (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) } } -void helper_vsum4sbs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +void helper_vsum4sbs (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b) { int i, j; int sat = 0; @@ -2963,7 +2963,7 @@ void helper_vsum4sbs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) } } -void helper_vsum4shs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +void helper_vsum4shs (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b) { int sat = 0; int i; @@ -2979,7 +2979,7 @@ void helper_vsum4shs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) } } -void helper_vsum4ubs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +void helper_vsum4ubs (union ppc_avr *r, union ppc_avr *a, union ppc_avr *b) { int i, j; int sat = 0; @@ -3005,10 +3005,10 @@ void helper_vsum4ubs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) #define UPKLO 1 #endif #define VUPKPX(suffix, hi) \ - void helper_vupk##suffix (ppc_avr_t *r, ppc_avr_t *b) \ + void helper_vupk##suffix (union ppc_avr *r, union ppc_avr *b) \ { \ int i; \ - ppc_avr_t result; \ + union ppc_avr result; \ for (i = 0; i < ARRAY_SIZE(r->u32); i++) { \ uint16_t e = b->u16[hi ? i : i+4]; \ uint8_t a = (e >> 15) ? 0xff : 0; \ @@ -3024,10 +3024,10 @@ VUPKPX(hpx, UPKHI) #undef VUPKPX #define VUPK(suffix, unpacked, packee, hi) \ - void helper_vupk##suffix (ppc_avr_t *r, ppc_avr_t *b) \ + void helper_vupk##suffix (union ppc_avr *r, union ppc_avr *b) \ { \ int i; \ - ppc_avr_t result; \ + union ppc_avr result; \ if (hi) { \ for (i = 0; i < ARRAY_SIZE(r->unpacked); i++) { \ result.unpacked[i] = b->packee[i]; \ @@ -3921,7 +3921,7 @@ static inline int booke_page_size_to_tlb(target_ulong page_size) /* Helpers for 4xx TLB management */ target_ulong helper_4xx_tlbre_lo (target_ulong entry) { - ppcemb_tlb_t *tlb; + a_ppcemb_tlb *tlb; target_ulong ret; int size; @@ -3940,7 +3940,7 @@ target_ulong helper_4xx_tlbre_lo (target_ulong entry) target_ulong helper_4xx_tlbre_hi (target_ulong entry) { - ppcemb_tlb_t *tlb; + a_ppcemb_tlb *tlb; target_ulong ret; entry &= 0x3F; @@ -3955,7 +3955,7 @@ target_ulong helper_4xx_tlbre_hi (target_ulong entry) void helper_4xx_tlbwe_hi (target_ulong entry, target_ulong val) { - ppcemb_tlb_t *tlb; + a_ppcemb_tlb *tlb; target_ulong page, end; LOG_SWTLB("%s entry %d val " TARGET_FMT_lx "\n", __func__, (int)entry, @@ -4010,7 +4010,7 @@ void helper_4xx_tlbwe_hi (target_ulong entry, target_ulong val) void helper_4xx_tlbwe_lo (target_ulong entry, target_ulong val) { - ppcemb_tlb_t *tlb; + a_ppcemb_tlb *tlb; LOG_SWTLB("%s entry %i val " TARGET_FMT_lx "\n", __func__, (int)entry, val); @@ -4039,7 +4039,7 @@ target_ulong helper_4xx_tlbsx (target_ulong address) /* PowerPC 440 TLB management */ void helper_440_tlbwe (uint32_t word, target_ulong entry, target_ulong value) { - ppcemb_tlb_t *tlb; + a_ppcemb_tlb *tlb; target_ulong EPN, RPN, size; int do_flush_tlbs; @@ -4101,7 +4101,7 @@ void helper_440_tlbwe (uint32_t word, target_ulong entry, target_ulong value) target_ulong helper_440_tlbre (uint32_t word, target_ulong entry) { - ppcemb_tlb_t *tlb; + a_ppcemb_tlb *tlb; target_ulong ret; int size; diff --git a/target-ppc/translate.c b/target-ppc/translate.c index d4e81ce89..640016b39 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -191,11 +191,11 @@ typedef struct DisasContext { int fpu_enabled; int altivec_enabled; int spe_enabled; - ppc_spr_t *spr_cb; /* Needed to check rights for mfspr/mtspr */ + a_ppc_spr *spr_cb; /* Needed to check rights for mfspr/mtspr */ int singlestep_enabled; } DisasContext; -struct opc_handler_t { +struct opc_handler { /* invalid bits */ uint32_t inval; /* instruction type */ @@ -318,16 +318,16 @@ GEN_OPCODE(name, opc1, opc2, opc3, inval, type) #define GEN_HANDLER2(name, onam, opc1, opc2, opc3, inval, type) \ GEN_OPCODE2(name, onam, opc1, opc2, opc3, inval, type) -typedef struct opcode_t { +typedef struct opcode { unsigned char opc1, opc2, opc3; #if HOST_LONG_BITS == 64 /* Explicitly align to 64 bits */ unsigned char pad[5]; #else unsigned char pad[1]; #endif - opc_handler_t handler; + an_opc_handler handler; const char *oname; -} opcode_t; +} an_opcode; /*****************************************************************************/ /*** Instruction decoding ***/ @@ -530,7 +530,7 @@ static void gen_invalid(DisasContext *ctx) gen_inval_exception(ctx, POWERPC_EXCP_INVAL_INVAL); } -static opc_handler_t invalid_handler = { +static an_opc_handler invalid_handler = { .inval = 0xFFFFFFFF, .type = PPC_NONE, .handler = gen_invalid, @@ -7975,7 +7975,7 @@ GEN_SPE(efdctsiz, speundef, 0x1D, 0x0B, 0x00180000, PPC_SPE_DOUBLE); GEN_SPE(efdtstgt, efdtstlt, 0x1E, 0x0B, 0x00600000, PPC_SPE_DOUBLE); // GEN_SPE(efdtsteq, speundef, 0x1F, 0x0B, 0x00600000, PPC_SPE_DOUBLE); // -static opcode_t opcodes[] = { +static an_opcode opcodes[] = { GEN_HANDLER(invalid, 0x00, 0x00, 0x00, 0xFFFFFFFF, PPC_NONE), GEN_HANDLER(cmp, 0x1F, 0x00, 0x00, 0x00400000, PPC_INTEGER), GEN_HANDLER(cmpi, 0x0B, 0xFF, 0xFF, 0x00400000, PPC_INTEGER), @@ -8903,7 +8903,7 @@ void cpu_dump_statistics (CPUState *env, FILE*f, int flags) { #if defined(DO_PPC_STATISTICS) - opc_handler_t **t1, **t2, **t3, *handler; + an_opc_handler **t1, **t2, **t3, *handler; int op1, op2, op3; t1 = env->opcodes; @@ -8951,7 +8951,7 @@ static inline void gen_intermediate_code_internal(CPUState *env, int search_pc) { DisasContext ctx, *ctxp = &ctx; - opc_handler_t **table, *handler; + an_opc_handler **table, *handler; target_ulong pc_start; uint16_t *gen_opc_end; CPUBreakpoint *bp; diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 79d3b4ca9..c7b857fa6 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -32,15 +32,15 @@ #define TODO_USER_ONLY 1 #endif -struct ppc_def_t { +struct ppc_def { const char *name; uint32_t pvr; uint32_t svr; uint64_t insns_flags; uint64_t msr_mask; - powerpc_mmu_t mmu_model; - powerpc_excp_t excp_model; - powerpc_input_t bus_model; + e_powerpc_mmu mmu_model; + e_powerpc_excp excp_model; + e_powerpc_input bus_model; uint32_t flags; int bfd_mach; void (*init_proc)(CPUPPCState *env); @@ -531,7 +531,7 @@ static inline void spr_register (CPUPPCState *env, int num, target_ulong initial_value) #endif { - ppc_spr_t *spr; + a_ppc_spr *spr; spr = &env->spr_cb[num]; if (spr->name != NULL ||env-> spr[num] != 0x00000000 || @@ -7228,7 +7228,7 @@ enum { #define POWERPC_DEF(_name, _pvr, _type) \ POWERPC_DEF_SVR(_name, _pvr, POWERPC_SVR_NONE, _type) -static const ppc_def_t ppc_defs[] = { +static const a_ppc_def ppc_defs[] = { /* Embedded PowerPC */ /* PowerPC 401 family */ /* Generic PowerPC 401 */ @@ -8882,7 +8882,7 @@ static const ppc_def_t ppc_defs[] = { /*****************************************************************************/ /* Generic CPU instanciation routine */ -static void init_ppc_proc (CPUPPCState *env, const ppc_def_t *def) +static void init_ppc_proc (CPUPPCState *env, const a_ppc_def *def) { #if !defined(CONFIG_USER_ONLY) int i; @@ -9022,7 +9022,7 @@ static void init_ppc_proc (CPUPPCState *env, const ppc_def_t *def) int nb_tlb = env->nb_tlb; if (env->id_tlbs != 0) nb_tlb *= 2; - env->tlb = qemu_mallocz(nb_tlb * sizeof(ppc_tlb_t)); + env->tlb = qemu_mallocz(nb_tlb * sizeof(union ppc_tlb)); /* Pre-compute some useful values */ env->tlb_per_way = env->nb_tlb / env->nb_ways; } @@ -9093,14 +9093,14 @@ static inline int is_indirect_opcode (void *handler) return ((unsigned long)handler & 0x03) == PPC_INDIRECT; } -static inline opc_handler_t **ind_table(void *handler) +static inline an_opc_handler **ind_table(void *handler) { - return (opc_handler_t **)((unsigned long)handler & ~3); + return (an_opc_handler **)((unsigned long)handler & ~3); } /* Instruction table creation */ /* Opcodes tables creation */ -static void fill_new_table (opc_handler_t **table, int len) +static void fill_new_table (an_opc_handler **table, int len) { int i; @@ -9108,19 +9108,19 @@ static void fill_new_table (opc_handler_t **table, int len) table[i] = &invalid_handler; } -static int create_new_table (opc_handler_t **table, unsigned char idx) +static int create_new_table (an_opc_handler **table, unsigned char idx) { - opc_handler_t **tmp; + an_opc_handler **tmp; - tmp = malloc(0x20 * sizeof(opc_handler_t)); + tmp = malloc(0x20 * sizeof(an_opc_handler)); fill_new_table(tmp, 0x20); - table[idx] = (opc_handler_t *)((unsigned long)tmp | PPC_INDIRECT); + table[idx] = (an_opc_handler *)((unsigned long)tmp | PPC_INDIRECT); return 0; } -static int insert_in_table (opc_handler_t **table, unsigned char idx, - opc_handler_t *handler) +static int insert_in_table (an_opc_handler **table, unsigned char idx, + an_opc_handler *handler) { if (table[idx] != &invalid_handler) return -1; @@ -9129,8 +9129,8 @@ static int insert_in_table (opc_handler_t **table, unsigned char idx, return 0; } -static int register_direct_insn (opc_handler_t **ppc_opcodes, - unsigned char idx, opc_handler_t *handler) +static int register_direct_insn (an_opc_handler **ppc_opcodes, + unsigned char idx, an_opc_handler *handler) { if (insert_in_table(ppc_opcodes, idx, handler) < 0) { printf("*** ERROR: opcode %02x already assigned in main " @@ -9145,9 +9145,9 @@ static int register_direct_insn (opc_handler_t **ppc_opcodes, return 0; } -static int register_ind_in_table (opc_handler_t **table, +static int register_ind_in_table (an_opc_handler **table, unsigned char idx1, unsigned char idx2, - opc_handler_t *handler) + an_opc_handler *handler) { if (table[idx1] == &invalid_handler) { if (create_new_table(table, idx1) < 0) { @@ -9180,9 +9180,9 @@ static int register_ind_in_table (opc_handler_t **table, return 0; } -static int register_ind_insn (opc_handler_t **ppc_opcodes, +static int register_ind_insn (an_opc_handler **ppc_opcodes, unsigned char idx1, unsigned char idx2, - opc_handler_t *handler) + an_opc_handler *handler) { int ret; @@ -9191,9 +9191,9 @@ static int register_ind_insn (opc_handler_t **ppc_opcodes, return ret; } -static int register_dblind_insn (opc_handler_t **ppc_opcodes, +static int register_dblind_insn (an_opc_handler **ppc_opcodes, unsigned char idx1, unsigned char idx2, - unsigned char idx3, opc_handler_t *handler) + unsigned char idx3, an_opc_handler *handler) { if (register_ind_in_table(ppc_opcodes, idx1, idx2, NULL) < 0) { printf("*** ERROR: unable to join indirect table idx " @@ -9210,7 +9210,7 @@ static int register_dblind_insn (opc_handler_t **ppc_opcodes, return 0; } -static int register_insn (opc_handler_t **ppc_opcodes, opcode_t *insn) +static int register_insn (an_opc_handler **ppc_opcodes, an_opcode *insn) { if (insn->opc2 != 0xFF) { if (insn->opc3 != 0xFF) { @@ -9230,7 +9230,7 @@ static int register_insn (opc_handler_t **ppc_opcodes, opcode_t *insn) return 0; } -static int test_opcode_table (opc_handler_t **table, int len) +static int test_an_opcodeable (an_opc_handler **table, int len) { int i, count, tmp; @@ -9240,7 +9240,7 @@ static int test_opcode_table (opc_handler_t **table, int len) table[i] = &invalid_handler; if (table[i] != &invalid_handler) { if (is_indirect_opcode(table[i])) { - tmp = test_opcode_table(ind_table(table[i]), 0x20); + tmp = test_an_opcodeable(ind_table(table[i]), 0x20); if (tmp == 0) { free(table[i]); table[i] = &invalid_handler; @@ -9256,16 +9256,16 @@ static int test_opcode_table (opc_handler_t **table, int len) return count; } -static void fix_opcode_tables (opc_handler_t **ppc_opcodes) +static void fix_an_opcodeables (an_opc_handler **ppc_opcodes) { - if (test_opcode_table(ppc_opcodes, 0x40) == 0) + if (test_an_opcodeable(ppc_opcodes, 0x40) == 0) printf("*** WARNING: no opcode defined !\n"); } /*****************************************************************************/ -static int create_ppc_opcodes (CPUPPCState *env, const ppc_def_t *def) +static int create_ppc_opcodes (CPUPPCState *env, const a_ppc_def *def) { - opcode_t *opc; + an_opcode *opc; fill_new_table(env->opcodes, 0x40); for (opc = opcodes; opc < &opcodes[ARRAY_SIZE(opcodes)]; opc++) { @@ -9278,7 +9278,7 @@ static int create_ppc_opcodes (CPUPPCState *env, const ppc_def_t *def) } } } - fix_opcode_tables(env->opcodes); + fix_an_opcodeables(env->opcodes); fflush(stdout); fflush(stderr); @@ -9288,7 +9288,7 @@ static int create_ppc_opcodes (CPUPPCState *env, const ppc_def_t *def) #if defined(PPC_DUMP_CPU) static void dump_ppc_insns (CPUPPCState *env) { - opc_handler_t **table, *handler; + an_opc_handler **table, *handler; const char *p, *q; uint8_t opc1, opc2, opc3; @@ -9475,7 +9475,7 @@ static int gdb_set_spe_reg(CPUState *env, uint8_t *mem_buf, int n) return 0; } -int cpu_ppc_register_internal (CPUPPCState *env, const ppc_def_t *def) +int cpu_ppc_register_internal (CPUPPCState *env, const a_ppc_def *def) { env->msr_mask = def->msr_mask; env->mmu_model = def->mmu_model; @@ -9667,9 +9667,9 @@ int cpu_ppc_register_internal (CPUPPCState *env, const ppc_def_t *def) return 0; } -static const ppc_def_t *ppc_find_by_pvr (uint32_t pvr) +static const a_ppc_def *ppc_find_by_pvr (uint32_t pvr) { - const ppc_def_t *ret; + const a_ppc_def *ret; uint32_t pvr_rev; int i, best, match, best_match, max; @@ -9707,9 +9707,9 @@ static const ppc_def_t *ppc_find_by_pvr (uint32_t pvr) #include <ctype.h> -const ppc_def_t *cpu_ppc_find_by_name (const char *name) +const a_ppc_def *cpu_ppc_find_by_name (const char *name) { - const ppc_def_t *ret; + const a_ppc_def *ret; const char *p; int i, max, len; |