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author | Edgar E. Iglesias <edgar.iglesias@gmail.com> | 2009-09-11 10:38:31 +0200 |
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committer | Edgar E. Iglesias <edgar.iglesias@gmail.com> | 2009-09-11 10:38:31 +0200 |
commit | 02b33596d09bafed5d58366403a2d369f0d1047e (patch) | |
tree | 1f71130701e7764fe3f2e58bcfbb05f7adcfc91c /target-microblaze | |
parent | microblaze: Correct prio between MMU and unaligned exceptions. (diff) | |
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microblaze: Trap if QEMU finds an unknown insns.
If PVR settings enable illegal insn trap, trap when QEMU finds an
insn it knows nothing about.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Diffstat (limited to 'target-microblaze')
-rw-r--r-- | target-microblaze/translate.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c index 37d250f9f..fe53b2e14 100644 --- a/target-microblaze/translate.c +++ b/target-microblaze/translate.c @@ -1144,6 +1144,12 @@ static void dec_fpu(DisasContext *dc) static void dec_null(DisasContext *dc) { + if ((dc->tb_flags & MSR_EE_FLAG) + && (dc->env->pvr.regs[2] & PVR2_ILL_OPCODE_EXC_MASK)) { + tcg_gen_movi_tl(cpu_SR[SR_ESR], ESR_EC_ILLEGAL_OP); + t_gen_raise_exception(dc, EXCP_HW_EXCP); + return; + } qemu_log ("unknown insn pc=%x opc=%x\n", dc->pc, dc->opcode); dc->abort_at_next_insn = 1; } |