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authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2009-04-05 20:08:59 +0000
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2009-04-05 20:08:59 +0000
commit1b530a6dfcfe4510f66cb90a1717698063ac7a4f (patch)
tree43c8336cbbd0c165cbde16898c76e9cb078a9b60 /target-arm
parenttcg/x86_64: optimize register allocation order (diff)
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Add new command line option -singlestep for tcg single stepping.
This replaces a compile time option for some targets and adds this feature to targets which did not have a compile time option. Add monitor command to enable or disable single step mode. Modify monitor command "info status" to display single step mode. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7004 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-arm')
-rw-r--r--target-arm/translate.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c
index f7f2a8d6f..9aff6197c 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -8791,6 +8791,7 @@ static inline void gen_intermediate_code_internal(CPUState *env,
num_insns ++;
} while (!dc->is_jmp && gen_opc_ptr < gen_opc_end &&
!env->singlestep_enabled &&
+ !singlestep &&
dc->pc < next_page_start &&
num_insns < max_insns);