diff options
Diffstat (limited to '2700_drm-i915-revert-Implement-Wa-1508744258.patch')
| -rw-r--r-- | 2700_drm-i915-revert-Implement-Wa-1508744258.patch | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/2700_drm-i915-revert-Implement-Wa-1508744258.patch b/2700_drm-i915-revert-Implement-Wa-1508744258.patch new file mode 100644 index 00000000..37e60701 --- /dev/null +++ b/2700_drm-i915-revert-Implement-Wa-1508744258.patch @@ -0,0 +1,51 @@ +From 72641d8d60401a5f1e1a0431ceaf928680d34418 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Jos=C3=A9=20Roberto=20de=20Souza?= <jose.souza@intel.com> +Date: Fri, 19 Nov 2021 06:09:30 -0800 +Subject: Revert "drm/i915: Implement Wa_1508744258" +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This workarounds are causing hangs, because I missed the fact that it +needs to be enabled for all cases and disabled when doing a resolve +pass. + +So KMD only needs to whitelist it and UMD will be the one setting it +on per case. + +This reverts commit 28ec02c9cbebf3feeaf21a59df9dfbc02bda3362. + +Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/4145 +Signed-off-by: José Roberto de Souza <jose.souza@intel.com> +Fixes: 28ec02c9cbeb ("drm/i915: Implement Wa_1508744258") +Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com> +Link: https://patchwork.freedesktop.org/patch/msgid/20211119140931.32791-1-jose.souza@intel.com +(cherry picked from commit f3799ff16fcfacd44aee55db162830df461b631f) +Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> +--- + drivers/gpu/drm/i915/gt/intel_workarounds.c | 7 ------- + 1 file changed, 7 deletions(-) + +(limited to 'drivers/gpu/drm/i915/gt/intel_workarounds.c') + +diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c +index e1f3625308891..ed73d9bc9d40b 100644 +--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c ++++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c +@@ -621,13 +621,6 @@ static void gen12_ctx_workarounds_init(struct intel_engine_cs *engine, + FF_MODE2_GS_TIMER_MASK, + FF_MODE2_GS_TIMER_224, + 0, false); +- +- /* +- * Wa_14012131227:dg1 +- * Wa_1508744258:tgl,rkl,dg1,adl-s,adl-p +- */ +- wa_masked_en(wal, GEN7_COMMON_SLICE_CHICKEN1, +- GEN9_RHWO_OPTIMIZATION_DISABLE); + } + + static void dg1_ctx_workarounds_init(struct intel_engine_cs *engine, +-- +cgit 1.2.3-1.el7 + |